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Describing Hardware with System Verilog

Hardware description languages (HDLs) are used to describe both the structure and behaviour of a digital logic circuit. HDL design can be passed through tools to either make a IC at a foundry or they can be mapped onto an FPGA device.

In this tutorial series we are going to learn a HDL called System Verilog and will simulate our designs with an open-source simulator called Verilator.

Each lesson will consist of:

  • a short video (~10 mins)
  • an exercise

At the end of this course you should be able to design your own custom digital circuits.

A lot of the examples are taken from the following books:

  • Verilog by Example: A Concise Introduction for FPGA Design, by Blaine Readler

Lessons

  1. Setting up the environment
  2. Simple In-N-Out
  3. Intermediate signal
  4. Bus Signals and muxs
  5. Procedural always blocks
  6. Bus breakout
  7. Sequential Logic and D-Type Flip Flops
  8. Describing a counter circuit
  9. Write Enable Register
  10. A Memory Mapped Interface

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