fpga: Cleanup testbench and testbench build

Update name of Winbond model Remove DUT variables from state display that was removed as part of performance fix Signed-off-by: Joachim Strömbergson <[email protected]>
tillitis · Jul 9, 2024 · 4574308 · 4574308
1 parent d297514
commit 4574308
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Showing 2 changed files with 2 additions and 5 deletions.
diff --git a/hw/application_fpga/core/tk1/tb/tb_tk1_spi_master.v b/hw/application_fpga/core/tk1/tb/tb_tk1_spi_master.v
@@ -92,7 +92,7 @@ module tb_tk1_spi_master();
   //----------------------------------------------------------------
   // spi_memory
   //----------------------------------------------------------------
-  W25Q80DL spi_memory(
+  W25Q80DV spi_memory(
 		      .CSn(tb_spi_ss),
 		      .CLK(tb_spi_sck),
 		      .DIO(tb_spi_mosi),
@@ -155,9 +155,6 @@ module tb_tk1_spi_master();
 
       $display("");
       $display("Internal state:");
-      $display("spi_clk_ctr_rst: 0x%1x, spi_clk_ctr_reg: 0x%02x",
-	       dut.spi_clk_ctr_rst, dut.spi_clk_ctr_reg);
-      $display("");
       $display("spi_bit_ctr_rst: 0x%1x, spi_bit_ctr_inc: 0x%1x, spi_bit_ctr_reg: 0x%02x",
 	       dut.spi_bit_ctr_rst, dut.spi_bit_ctr_inc, dut.spi_bit_ctr_reg);
       $display("");

diff --git a/hw/application_fpga/core/tk1/toolruns/Makefile b/hw/application_fpga/core/tk1/toolruns/Makefile
@@ -13,7 +13,7 @@
 
 SPI_SRC=../rtl/tk1_spi_master.v
 TB_SPI_SRC =../tb/tb_tk1_spi_master.v
-MEM_MODEL_SRC =../tb/W25Q80DL.v
+MEM_MODEL_SRC =../tb/W25Q80DV.v
 
 TOP_SRC=../rtl/tk1.v $(SPI_SRC)
 TB_TOP_SRC =../tb/tb_tk1.v ../tb/sb_rgba_drv.v ../tb/udi_rom_sim.v