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FPGA: Move RAM address and data scrambling into the RAM module.
Move the logic implementing the RAM address and data scrambling, descrambling into the RAM module. This cleans up the top level, and makes it easier to change the scrambling without chaning the top. Clean up some minor details at the top level, fixing text aligment and grouping of ports in instances. Signed-off-by: Joachim Strömbergson <[email protected]>
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