FPGA: Add CPU instruction address SPI access control #445

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Triggered via pull request July 9, 2024 14:00

dehanj

synchronize #243

pc_based_access_control_spi

Status Failure

Total duration 5m 27s

Artifacts –

ci.yaml

on: pull_request

build-bitstream

build-other-firmwares

build-spi-bitstream

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Process completed with exit code 2.