FPGA: Add CPU instruction address SPI access control #435

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Triggered via pull request July 9, 2024 10:26

dehanj

synchronize #243

pc_based_access_control_spi

Status Failure

Total duration 4m 49s

Artifacts –

ci.yaml

on: pull_request

build-bitstream

build-other-firmwares

build-spi-bitstream

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3 errors and 1 warning

check-verilog

Process completed with exit code 2.

build-spi-bitstream

Unhandled error: HttpError: Not Found

check-hashes

Process completed with exit code 2.

build-spi-bitstream

The following actions uses Node.js version which is deprecated and will be forced to run on node20: actions/github-script@v6. For more info: https://github.blog/changelog/2024-03-07-github-actions-all-actions-will-run-on-node20-instead-of-node16-by-default/