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FPGA: Add CPU instruction address SPI access control #422

FPGA: Add CPU instruction address SPI access control

FPGA: Add CPU instruction address SPI access control #422

Triggered via pull request July 4, 2024 12:23
Status Failure
Total duration 4m 10s
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ci.yaml

on: pull_request
build-bitstream
2m 51s
build-bitstream
check-firmware
57s
check-firmware
check-verilog
1m 18s
check-verilog
build-other-firmwares
59s
build-other-firmwares
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2 errors
check-verilog
Process completed with exit code 2.
check-hashes
Process completed with exit code 2.