alternate pin function enums

Cargo.toml

@@ -192,6 +192,10 @@ required-features = ["fmc", "rm0399"]
 name = "fmc_nand_flash"
 required-features = ["fmc"]
 
+[[example]]
+name = "i2c4_bdma"
+required-features = ["rm0433"]
+
 [[example]]
 name = "octospi"
 required-features = ["xspi", "rm0468"]
@@ -232,6 +236,10 @@ required-features = ["sdmmc"]
 name = "sdmmc_fat"
 required-features = ["sdmmc", "sdmmc-fatfs"]
 
+[[example]]
+name = "spi-dma"
+required-features = ["rm0433"]
+
 [[example]]
 name = "spi-dma-rtic"
 required-features = ["rt"]

examples/ethernet-nucleo-h743zi2.rs

@@ -22,8 +22,8 @@ extern crate cortex_m;
 mod utilities;
 use log::info;
 
+use stm32h7xx_hal::ethernet::{self, TwoLanesPins, PHY};
 use stm32h7xx_hal::rcc::CoreClocks;
-use stm32h7xx_hal::{ethernet, ethernet::PHY};
 use stm32h7xx_hal::{prelude::*, stm32, stm32::interrupt};
 
 /// Configure SYSTICK for 1ms timebase
@@ -94,15 +94,15 @@ fn main() -> ! {
     let mut link_led = gpiob.pb0.into_push_pull_output(); // LED1, green
     link_led.set_high();
 
-    let rmii_ref_clk = gpioa.pa1.into_alternate();
-    let rmii_mdio = gpioa.pa2.into_alternate();
-    let rmii_mdc = gpioc.pc1.into_alternate();
-    let rmii_crs_dv = gpioa.pa7.into_alternate();
-    let rmii_rxd0 = gpioc.pc4.into_alternate();
-    let rmii_rxd1 = gpioc.pc5.into_alternate();
-    let rmii_tx_en = gpiog.pg11.into_alternate();
-    let rmii_txd0 = gpiog.pg13.into_alternate();
-    let rmii_txd1 = gpiob.pb13.into_alternate();
+    let rmii_ref_clk = gpioa.pa1;
+    let rmii_mdio = gpioa.pa2;
+    let rmii_mdc = gpioc.pc1;
+    let rmii_crs_dv = gpioa.pa7;
+    let rmii_rxd0 = gpioc.pc4;
+    let rmii_rxd1 = gpioc.pc5;
+    let rmii_tx_en = gpiog.pg11;
+    let rmii_txd0 = gpiog.pg13;
+    let rmii_txd1 = gpiob.pb13;
 
     // Initialise ethernet...
     assert_eq!(ccdr.clocks.hclk().raw(), 200_000_000); // HCLK 200MHz
@@ -116,7 +116,7 @@ fn main() -> ! {
             dp.ETHERNET_MAC,
             dp.ETHERNET_MTL,
             dp.ETHERNET_DMA,
-            (
+            TwoLanesPins::new(
                 rmii_ref_clk,
                 rmii_mdio,
                 rmii_mdc,

examples/ethernet-rtic-stm32h735g-dk.rs

@@ -23,7 +23,11 @@ use smoltcp::iface::{Config, Interface, SocketSet, SocketStorage};
 use smoltcp::time::Instant;
 use smoltcp::wire::{HardwareAddress, IpAddress, IpCidr};
 
-use stm32h7xx_hal::{ethernet, rcc::CoreClocks, stm32};
+use stm32h7xx_hal::{
+    ethernet::{self, TwoLanesPins},
+    rcc::CoreClocks,
+    stm32,
+};
 
 /// Configure SYSTICK for 1ms timebase
 fn systick_init(mut syst: stm32::SYST, clocks: CoreClocks) {
@@ -139,15 +143,15 @@ mod app {
         let mut link_led = gpioc.pc3.into_push_pull_output(); // USR LED1
         link_led.set_high();
 
-        let rmii_ref_clk = gpioa.pa1.into_alternate();
-        let rmii_mdio = gpioa.pa2.into_alternate();
-        let rmii_mdc = gpioc.pc1.into_alternate();
-        let rmii_crs_dv = gpioa.pa7.into_alternate();
-        let rmii_rxd0 = gpioc.pc4.into_alternate();
-        let rmii_rxd1 = gpioc.pc5.into_alternate();
-        let rmii_tx_en = gpiob.pb11.into_alternate();
-        let rmii_txd0 = gpiob.pb12.into_alternate();
-        let rmii_txd1 = gpiob.pb13.into_alternate();
+        let rmii_ref_clk = gpioa.pa1;
+        let rmii_mdio = gpioa.pa2;
+        let rmii_mdc = gpioc.pc1;
+        let rmii_crs_dv = gpioa.pa7;
+        let rmii_rxd0 = gpioc.pc4;
+        let rmii_rxd1 = gpioc.pc5;
+        let rmii_tx_en = gpiob.pb11;
+        let rmii_txd0 = gpiob.pb12;
+        let rmii_txd1 = gpiob.pb13;
 
         // Initialise ethernet...
         assert_eq!(ccdr.clocks.hclk().raw(), 200_000_000); // HCLK 200MHz
@@ -161,7 +165,7 @@ mod app {
                 ctx.device.ETHERNET_MAC,
                 ctx.device.ETHERNET_MTL,
                 ctx.device.ETHERNET_DMA,
-                (
+                TwoLanesPins::new(
                     rmii_ref_clk,
                     rmii_mdio,
                     rmii_mdc,

examples/ethernet-rtic-stm32h747i-disco.rs

@@ -30,7 +30,11 @@ use smoltcp::iface::{Config, Interface, SocketSet, SocketStorage};
 use smoltcp::time::Instant;
 use smoltcp::wire::{HardwareAddress, IpAddress, IpCidr};
 
-use stm32h7xx_hal::{ethernet, rcc::CoreClocks, stm32};
+use stm32h7xx_hal::{
+    ethernet::{self, TwoLanesPins},
+    rcc::CoreClocks,
+    stm32,
+};
 
 /// Configure SYSTICK for 1ms timebase
 fn systick_init(mut syst: stm32::SYST, clocks: CoreClocks) {
@@ -149,15 +153,15 @@ mod app {
         let mut link_led = gpioi.pi14.into_push_pull_output(); // LED3
         link_led.set_high();
 
-        let rmii_ref_clk = gpioa.pa1.into_alternate();
-        let rmii_mdio = gpioa.pa2.into_alternate();
-        let rmii_mdc = gpioc.pc1.into_alternate();
-        let rmii_crs_dv = gpioa.pa7.into_alternate();
-        let rmii_rxd0 = gpioc.pc4.into_alternate();
-        let rmii_rxd1 = gpioc.pc5.into_alternate();
-        let rmii_tx_en = gpiog.pg11.into_alternate();
-        let rmii_txd0 = gpiog.pg13.into_alternate();
-        let rmii_txd1 = gpiog.pg12.into_alternate(); // STM32H747I-DISCO
+        let rmii_ref_clk = gpioa.pa1;
+        let rmii_mdio = gpioa.pa2;
+        let rmii_mdc = gpioc.pc1;
+        let rmii_crs_dv = gpioa.pa7;
+        let rmii_rxd0 = gpioc.pc4;
+        let rmii_rxd1 = gpioc.pc5;
+        let rmii_tx_en = gpiog.pg11;
+        let rmii_txd0 = gpiog.pg13;
+        let rmii_txd1 = gpiog.pg12; // STM32H747I-DISCO
 
         // Initialise ethernet...
         assert_eq!(ccdr.clocks.hclk().raw(), 200_000_000); // HCLK 200MHz
@@ -171,7 +175,7 @@ mod app {
                 ctx.device.ETHERNET_MAC,
                 ctx.device.ETHERNET_MTL,
                 ctx.device.ETHERNET_DMA,
-                (
+                TwoLanesPins::new(
                     rmii_ref_clk,
                     rmii_mdio,
                     rmii_mdc,

examples/ethernet-stm32h747i-disco.rs

@@ -20,7 +20,7 @@ mod utilities;
 
 use log::info;
 
-use stm32h7xx_hal::{ethernet, ethernet::PHY};
+use stm32h7xx_hal::ethernet::{self, TwoLanesPins, PHY};
 use stm32h7xx_hal::{prelude::*, stm32, stm32::interrupt};
 
 /// Locally administered MAC address
@@ -67,15 +67,15 @@ fn main() -> ! {
     let mut link_led = gpioi.pi14.into_push_pull_output(); // LED3
     link_led.set_high();
 
-    let rmii_ref_clk = gpioa.pa1.into_alternate();
-    let rmii_mdio = gpioa.pa2.into_alternate();
-    let rmii_mdc = gpioc.pc1.into_alternate();
-    let rmii_crs_dv = gpioa.pa7.into_alternate();
-    let rmii_rxd0 = gpioc.pc4.into_alternate();
-    let rmii_rxd1 = gpioc.pc5.into_alternate();
-    let rmii_tx_en = gpiog.pg11.into_alternate();
-    let rmii_txd0 = gpiog.pg13.into_alternate();
-    let rmii_txd1 = gpiog.pg12.into_alternate();
+    let rmii_ref_clk = gpioa.pa1;
+    let rmii_mdio = gpioa.pa2;
+    let rmii_mdc = gpioc.pc1;
+    let rmii_crs_dv = gpioa.pa7;
+    let rmii_rxd0 = gpioc.pc4;
+    let rmii_rxd1 = gpioc.pc5;
+    let rmii_tx_en = gpiog.pg11;
+    let rmii_txd0 = gpiog.pg13;
+    let rmii_txd1 = gpiog.pg12;
 
     // Initialise ethernet...
     assert_eq!(ccdr.clocks.hclk().raw(), 200_000_000); // HCLK 200MHz
@@ -89,7 +89,7 @@ fn main() -> ! {
             dp.ETHERNET_MAC,
             dp.ETHERNET_MTL,
             dp.ETHERNET_DMA,
-            (
+            TwoLanesPins::new(
                 rmii_ref_clk,
                 rmii_mdio,
                 rmii_mdc,

examples/fmc.rs

@@ -15,20 +15,18 @@ mod utilities;
 extern crate cortex_m;
 
 use cortex_m_rt::entry;
-use stm32h7xx_hal::gpio::Speed;
+use stm32h7xx_hal::gpio::alt::fmc as alt;
 use stm32h7xx_hal::{pac, prelude::*};
 
 use stm32_fmc::devices::is42s32800g_6;
 
 /// Configre a pin for the FMC controller
 macro_rules! fmc_pins {
-    ($($pin:expr),*) => {
+    ($($alt:ty: $pin:expr),*) => {
         (
             $(
-                $pin.into_push_pull_output()
-                    .speed(Speed::VeryHigh)
-                    .into_alternate::<12>()
-                    .internal_pull_up(true)
+                <$alt>::from($pin.into_alternate()
+                    .internal_pull_up(true))
             ),*
         )
     };
@@ -156,28 +154,40 @@ fn main() -> ! {
     // Initialise SDRAM...
     let sdram_pins = fmc_pins! {
         // A0-A11
-        gpiof.pf0, gpiof.pf1, gpiof.pf2, gpiof.pf3,
-        gpiof.pf4, gpiof.pf5, gpiof.pf12, gpiof.pf13,
-        gpiof.pf14, gpiof.pf15, gpiog.pg0, gpiog.pg1,
+        alt::A0: gpiof.pf0,  alt::A1: gpiof.pf1,
+        alt::A2: gpiof.pf2,  alt::A3: gpiof.pf3,
+        alt::A4: gpiof.pf4,  alt::A5: gpiof.pf5,
+        alt::A6: gpiof.pf12, alt::A7: gpiof.pf13,
+        alt::A8: gpiof.pf14, alt::A9: gpiof.pf15,
+        alt::A10: gpiog.pg0, alt::A11: gpiog.pg1,
         // BA0-BA1
-        gpiog.pg4, gpiog.pg5,
+        alt::Ba0: gpiog.pg4, alt::Ba1: gpiog.pg5,
         // D0-D31
-        gpiod.pd14, gpiod.pd15, gpiod.pd0, gpiod.pd1,
-        gpioe.pe7, gpioe.pe8, gpioe.pe9, gpioe.pe10,
-        gpioe.pe11, gpioe.pe12, gpioe.pe13, gpioe.pe14,
-        gpioe.pe15, gpiod.pd8, gpiod.pd9, gpiod.pd10,
-        gpioh.ph8, gpioh.ph9, gpioh.ph10, gpioh.ph11,
-        gpioh.ph12, gpioh.ph13, gpioh.ph14, gpioh.ph15,
-        gpioi.pi0, gpioi.pi1, gpioi.pi2, gpioi.pi3,
-        gpioi.pi6, gpioi.pi7, gpioi.pi9, gpioi.pi10,
+        alt::D0: gpiod.pd14,  alt::D1: gpiod.pd15,
+        alt::D2: gpiod.pd0,   alt::D3: gpiod.pd1,
+        alt::D4: gpioe.pe7,   alt::D5: gpioe.pe8,
+        alt::D6: gpioe.pe9,   alt::D7: gpioe.pe10,
+        alt::D8: gpioe.pe11,  alt::D9: gpioe.pe12,
+        alt::D10: gpioe.pe13, alt::D11: gpioe.pe14,
+        alt::D12: gpioe.pe15, alt::D13: gpiod.pd8,
+        alt::D14: gpiod.pd9,  alt::D15: gpiod.pd10,
+        alt::D16: gpioh.ph8,  alt::D17: gpioh.ph9,
+        alt::D18: gpioh.ph10, alt::D19: gpioh.ph11,
+        alt::D20: gpioh.ph12, alt::D21: gpioh.ph13,
+        alt::D22: gpioh.ph14, alt::D23: gpioh.ph15,
+        alt::D24: gpioi.pi0,  alt::D25: gpioi.pi1,
+        alt::D26: gpioi.pi2,  alt::D27: gpioi.pi3,
+        alt::D28: gpioi.pi6,  alt::D29: gpioi.pi7,
+        alt::D30: gpioi.pi9,  alt::D31: gpioi.pi10,
         // NBL0 - NBL3
-        gpioe.pe0, gpioe.pe1, gpioi.pi4, gpioi.pi5,
-        gpioh.ph7,              // SDCKE1
-        gpiog.pg8,              // SDCLK
-        gpiog.pg15,             // SDNCAS
-        gpioh.ph6,              // SDNE1 (!CS)
-        gpiof.pf11,             // SDRAS
-        gpioh.ph5               // SDNWE
+        alt::Nbl0: gpioe.pe0, alt::Nbl1: gpioe.pe1,
+        alt::Nbl2: gpioi.pi4, alt::Nbl3: gpioi.pi5,
+        alt::Sdcke1: gpioh.ph7,
+        alt::Sdclk: gpiog.pg8,
+        alt::Sdncas: gpiog.pg15,
+        alt::Sdne1: gpioh.ph6,
+        alt::Sdnras: gpiof.pf11,             // SDRAS
+        alt::Sdnwe: gpioh.ph5               // SDNWE
     };
 
     let mut sdram = dp.FMC.sdram(

examples/fmc_nand_flash.rs

@@ -15,21 +15,19 @@ use log::info;
 extern crate cortex_m;
 
 use cortex_m_rt::entry;
-use stm32h7xx_hal::gpio::Speed;
+use stm32h7xx_hal::gpio::alt::fmc as alt;
 use stm32h7xx_hal::{pac, prelude::*, rcc::rec};
 
 use stm32_fmc::devices::s34ml08g3_4kb;
 use stm32_fmc::nand_device::Status;
 
 /// Configre a pin for the FMC controller
 macro_rules! fmc_pins {
-    ($($pin:expr),*) => {
+    ($($alt:ty: $pin:expr),*) => {
         (
             $(
-                $pin.into_push_pull_output()
-                    .speed(Speed::VeryHigh)
-                    .into_alternate::<12>()
-                    .internal_pull_up(true)
+                <$alt>::from($pin.into_alternate()
+                    .internal_pull_up(true))
             ),*
         )
     };
@@ -71,21 +69,22 @@ fn main() -> ! {
     // Initialise NAND Flash...
     let nand_flash_pins = fmc_pins! {
         // A17/ALE; A16/CLE
-        gpiod.pd12, gpiod.pd11,
+        alt::A17: gpiod.pd12,
+        alt::A16: gpiod.pd11,
         // D0-D7
-        gpiod.pd14,
-        gpiod.pd15,
-        gpiod.pd0,
-        gpiod.pd1,
-        gpioe.pe7,
-        gpioe.pe8,
-        gpioe.pe9,
-        gpioe.pe10,
+        alt::D0: gpiod.pd14,
+        alt::D1: gpiod.pd15,
+        alt::D2: gpiod.pd0,
+        alt::D3: gpiod.pd1,
+        alt::D4: gpioe.pe7,
+        alt::D5: gpioe.pe8,
+        alt::D6: gpioe.pe9,
+        alt::D7: gpioe.pe10,
         //
-        gpiog.pg9,              // NCE
-        gpiod.pd4,              // NOE
-        gpiod.pd5,              // NWE
-        gpiod.pd6               // NWAIT
+        alt::Nce: gpiog.pg9,
+        alt::Noe: gpiod.pd4,
+        alt::Nwe: gpiod.pd5,
+        alt::Nwait: gpiod.pd6
     };
     gpioe.pe2.into_push_pull_output().set_high(); // unprotect
 

examples/i2c4_bdma.rs

@@ -58,8 +58,8 @@ fn main() -> ! {
     let gpiod = dp.GPIOD.split(ccdr.peripheral.GPIOD);
 
     // Configure the SCL and the SDA pin for our I2C bus
-    let scl = gpiod.pd12.into_alternate().set_open_drain();
-    let sda = gpiod.pd13.into_alternate().set_open_drain();
+    let scl = gpiod.pd12;
+    let sda = gpiod.pd13;
 
     let mut i2c = dp.I2C4.i2c(
         (scl, sda),