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Merge pull request #792 from stm32-rs/fmc-upd
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bump stm32-fmc
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burrbull authored Aug 4, 2024
2 parents 478fee0 + b9405d0 commit 609f5a5
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Showing 5 changed files with 28 additions and 30 deletions.
8 changes: 4 additions & 4 deletions Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -57,7 +57,7 @@ embedded-hal-async = { version = "1.0", optional = true }
rtic = { version = "2.0.1", features = ["thumbv7-backend"], optional = true }
atomic-polyfill = { version = "1.0.3", optional = true }

stm32-fmc = { version = "0.3.0", optional = true }
stm32-fmc = { version = "0.3.2", optional = true }

enumflags2 = "0.7.8"
embedded-storage = "0.3"
Expand Down Expand Up @@ -768,6 +768,6 @@ required-features = ["otg-fs", "usb_fs"] # stm32f401
name = "ws2812-spi"
required-features = []

#[[example]]
#name = "fmc-sdram"
#required-features = ["stm32f469", "stm32-fmc"]
[[example]]
name = "fmc-sdram"
required-features = ["stm32f469", "stm32-fmc"]
16 changes: 7 additions & 9 deletions examples/fmc-sdram.rs.disabled → examples/fmc-sdram.rs
Original file line number Diff line number Diff line change
Expand Up @@ -6,11 +6,8 @@

use panic_probe as _;

use stm32f469i_disc as board;

use crate::board::hal::gpio::alt::fmc as alt;
use crate::board::hal::{fmc::FmcExt, pac, prelude::*};
use core::{mem, slice};
use stm32f4xx_hal::{fmc::FmcExt, gpio::alt::fmc as alt, pac, prelude::*};

use cortex_m::peripheral::Peripherals;

Expand Down Expand Up @@ -101,26 +98,25 @@ fn main() -> ! {
let mut pattern = XorShift32::new(seed);

// write our pattern
for addr in 0..len_words {
for (addr, res) in ram.iter_mut().enumerate().take(len_words) {
let val = pattern.next();

if (addr & 0x1ffff) == 0 {
rprintln!("Write: {:X} <- {:X}\r", (ram_ptr as usize) + addr, val);
}

ram[addr] = val;
*res = val;
}

// read back pattern
pattern = XorShift32::new(seed);
for addr in 0..len_words {
for (addr, &res) in ram.iter().enumerate().take(len_words) {
let val = pattern.next();

if (addr & 0x1ffff) == 0 {
rprintln!("Read: {:X} -> {:X}\r", (ram_ptr as usize) + addr, val);
}

let res: u32 = ram[addr];
if res != val {
rprintln!(
"Error: {:X} -> {:X} != {:X}\r",
Expand All @@ -134,5 +130,7 @@ fn main() -> ! {

rprintln!("Done!\r");
}
loop {}
loop {
continue;
}
}
10 changes: 5 additions & 5 deletions src/dsi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -115,6 +115,7 @@ pub struct DsiPllConfig {
}

impl DsiPllConfig {
#[allow(clippy::missing_safety_doc)]
pub unsafe fn manual(ndiv: u8, idf: u8, odf: u8, eckdiv: u8) -> Self {
DsiPllConfig {
ndiv,
Expand Down Expand Up @@ -399,11 +400,10 @@ impl DsiHost {
.modify(|_, w| w.dep().clear_bit().vsp().clear_bit().hsp().clear_bit());

// Color coding for the host
let lpe = match dsi_config.color_coding_host {
ColorCoding::EighteenBitsConfig1 => true,
ColorCoding::EighteenBitsConfig2 => true,
_ => false,
};
let lpe = matches!(
dsi_config.color_coding_host,
ColorCoding::EighteenBitsConfig1 | ColorCoding::EighteenBitsConfig2
);
dsi.lcolcr().modify(|_, w| unsafe {
w.lpe()
.bit(lpe) // loosely packed: 18bits
Expand Down
2 changes: 1 addition & 1 deletion src/i2c.rs
Original file line number Diff line number Diff line change
Expand Up @@ -450,7 +450,7 @@ impl<I2C: Instance> I2c<I2C> {
return Err(Error::Overrun);
}

self.prepare_read(addr.into(), first_transaction)?;
self.prepare_read(addr, first_transaction)?;
self.read_wo_prepare(buffer)
}

Expand Down
22 changes: 11 additions & 11 deletions src/qspi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -165,21 +165,18 @@ impl QspiConfig {
}
}

#[derive(Copy, Clone, Debug, PartialEq)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[derive(Copy, Clone, Debug, Default, PartialEq, Eq)]
#[repr(u8)]
pub enum QspiMode {
#[default]
SingleChannel = 0b01,
DualChannel = 0b10,
QuadChannel = 0b11,
}

impl Default for QspiMode {
fn default() -> Self {
QspiMode::SingleChannel
}
}

#[derive(Copy, Clone, Debug, PartialEq)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[repr(u8)]
pub enum AddressSize {
Addr8Bit = 0b00,
Expand All @@ -188,19 +185,22 @@ pub enum AddressSize {
Addr32Bit = 0b11,
}

#[derive(Copy, Clone, Debug, PartialEq)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
pub enum SampleShift {
None,
HalfACycle,
}

#[derive(Copy, Clone, Debug, PartialEq)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
pub enum ClockMode {
Mode0,
Mode3,
}

#[derive(Copy, Clone, Debug, PartialEq)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
pub enum QspiError {
Busy,
Address,
Expand Down

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