Merge branch 'master' into patch-axel-5

seL4 · Jan 11, 2024 · 3e20f6e · 3e20f6e
2 parents 8c725ee + 50beab0
commit 3e20f6e
Showing 1 changed file with 3 additions and 3 deletions.
diff --git a/sel4test-hw/build.py b/sel4test-hw/build.py
@@ -66,8 +66,8 @@ def build_filter(build: Build) -> bool:
         # No MCS + SMP for platforms with global timer for now (see seL4/seL4#513)
         if plat.name == 'SABRE' and build.is_smp() and build.is_mcs():
             return False
-        # SCHED_CONTEXT_0014 fails on TX2 and ODROID_C4: https://github.com/seL4/seL4/issues/928
-        if (plat.name == 'TX2' or plat.name == 'ODROID_C4') and \
+        # SCHED_CONTEXT_0014 fails on TX1, TX2 and ODROID_C4: https://github.com/seL4/seL4/issues/928
+        if plat.name in ['TX1', 'TX2', 'ODROID_C4'] and \
            build.is_mcs() and build.is_smp() and build.is_hyp() and build.is_clang():
             return False
         # CACHEFLUSH0001 fails on ODROID_XU4: https://github.com/seL4/sel4test/issues/80
@@ -110,10 +110,10 @@ def run_for_plat(plat: Platform) -> List[dict]:
                 {"platform": plat.name, "march": plat.march, "compiler": "clang"},
             ]
 
-        # no clang for RISC-V yet
         if plat.arch == 'riscv':
             return [
                 {"platform": plat.name, "march": plat.march, "compiler": "gcc"},
+                {"platform": plat.name, "march": plat.march, "compiler": "clang"},
             ]
 
         # separate runs for each compiler + mode on x86, because we have more machines available