Fix some indentations in doc comments flagged by clippy in beta

rp2040-hal/src/sio.rs

@@ -591,16 +591,17 @@ pub unsafe fn spinlock_reset() {
 pub struct LaneCtrl {
     /// Bit 22 - Only present on INTERP1 on each core. If CLAMP mode is enabled:  
     /// - LANE0 result is shifted and masked ACCUM0, clamped by a lower bound of  
-    /// BASE0 and an upper bound of BASE1.  
+    ///   BASE0 and an upper bound of BASE1.
     /// - Signedness of these comparisons is determined by LANE0_CTRL_SIGNED
     pub clamp: bool,
     /// Bit 21 - Only present on INTERP0 on each core. If BLEND mode is enabled:
     /// - LANE1 result is a linear interpolation between BASE0 and BASE1, controlled
-    /// by the 8 LSBs of lane 1 shift and mask value (a fractional number between
-    /// 0 and 255/256ths)
+    ///   by the 8 LSBs of lane 1 shift and mask value (a fractional number between
+    ///   0 and 255/256ths)
     /// - LANE0 result does not have BASE0 added (yields only
-    /// the 8 LSBs of lane 1 shift+mask value)
+    ///   the 8 LSBs of lane 1 shift+mask value)
     /// - FULL result does not have lane 1 shift+mask value added (BASE2 + lane 0 shift+mask)
+    ///
     /// LANE1 SIGNED flag controls whether the interpolation is signed or unsigned.
     pub blend: bool,
     /// Bits 19:20 - ORed into bits 29:28 of the lane result presented to the processor on the bus.  

rp2040-hal/src/spi.rs

@@ -158,16 +158,17 @@ impl Sealed for u16 {}
 ///
 /// `Spi` has four generic parameters:
 /// - `S`: a typestate for whether the bus is [`Enabled`] or [`Disabled`]. Upon initial creation,
-/// the bus is [`Disabled`]. You will then need to initialize it as either a main (master) or sub
-/// (slave) device, providing the necessary configuration, at which point it will become [`Enabled`].
+///   the bus is [`Disabled`]. You will then need to initialize it as either a main (master) or sub
+///   (slave) device, providing the necessary configuration, at which point it will become [`Enabled`].
 /// - `D`: Which of the concrete Spi peripherals is being used, [`pac::SPI0`] or [`pac::SPI1`]
 /// - `P`: Which pins are being used to configure the Spi peripheral `D`. A table of valid
-/// pinouts for each Spi peripheral can be found in section 1.4.3 of the RP2040 datasheet.
-/// The [`ValidSpiPinout`] trait is implemented for tuples of pin types that follow the layout:
+///   pinouts for each Spi peripheral can be found in section 1.4.3 of the RP2040 datasheet.
+///   The [`ValidSpiPinout`] trait is implemented for tuples of pin types that follow the layout:
 ///     - `(Tx, Sck)` (i.e. first the "Tx"/"MOSI" pin, then the "Sck"/"Clock" pin)
 ///     - `(Tx, Rx, Sck)` (i.e. first "Tx"/"MOSI", then "Rx"/"MISO", then "Sck"/"Clock" pin)
-/// If you select an invalid layout, you will get a compile error that `P` does not implement
-/// [`ValidSpiPinout`] for your specified [`SpiDevice`] peripheral `D`
+///
+///   If you select an invalid layout, you will get a compile error that `P` does not implement
+///   [`ValidSpiPinout`] for your specified [`SpiDevice`] peripheral `D`
 /// - `DS`: The "data size", i.e. the number of bits transferred per data frame. Defaults to 8.
 ///
 /// In most cases you won't have to specify these types manually and can let the compiler infer

rp2040-hal/src/uart/peripheral.rs

@@ -174,6 +174,7 @@ impl<D: UartDevice, P: ValidUartPinout<D>> UartPeripheral<Enabled, D, P> {
     /// This function writes as long as it can. As soon that the FIFO is full, if :
     /// - 0 bytes were written, a WouldBlock Error is returned
     /// - some bytes were written, it is deemed to be a success
+    ///
     /// Upon success, the remaining slice is returned.
     pub fn write_raw<'d>(&self, data: &'d [u8]) -> nb::Result<&'d [u8], Infallible> {
         super::writer::write_raw(&self.device, data)
@@ -183,6 +184,7 @@ impl<D: UartDevice, P: ValidUartPinout<D>> UartPeripheral<Enabled, D, P> {
     /// This function reads as long as it can. As soon that the FIFO is empty, if :
     /// - 0 bytes were read, a WouldBlock Error is returned
     /// - some bytes were read, it is deemed to be a success
+    ///
     /// Upon success, it will return how many bytes were read.
     pub fn read_raw<'b>(&self, buffer: &'b mut [u8]) -> nb::Result<usize, ReadError<'b>> {
         super::reader::read_raw(&self.device, buffer)

rp2040-hal/src/uart/reader.rs

@@ -194,6 +194,7 @@ impl<D: UartDevice, P: ValidUartPinout<D>> Reader<D, P> {
     /// This function reads as long as it can. As soon that the FIFO is empty, if :
     /// - 0 bytes were read, a WouldBlock Error is returned
     /// - some bytes were read, it is deemed to be a success
+    ///
     /// Upon success, it will return how many bytes were read.
     pub fn read_raw<'b>(&self, buffer: &'b mut [u8]) -> nb::Result<usize, ReadError<'b>> {
         read_raw(&self.device, buffer)