--wip--

.vim/coc-settings.json

@@ -0,0 +1,9 @@
+{
+    "rust-analyzer.interpret.tests": true,
+    "rust-analyzer.cargo.features": [
+        "rt",
+        "critical-section-impl",
+        "defmt",
+        "i2c-write-iter"
+    ]
+}

Cargo.toml

@@ -8,6 +8,7 @@ rp2040-hal = { path = "./rp2040-hal" }
 
 [patch.crates-io]
 rp2040-hal = { path = "./rp2040-hal" }
+defmt-test-macros = { git = "https://github.com/knurling-rs/defmt", tag = "defmt-test-v0.3.1" }
 
 # Those profiles are only used for `on-target-tests` compilation
 [profile.dev]

on-target-tests/Cargo.toml

@@ -28,22 +28,49 @@ harness = false
 name = "dma_dyn"
 harness = false
 
+[[test]]
+name = "i2c_loopback"
+harness = false
+
+[[test]]
+name = "i2c_loopback_async"
+harness = false
+
 [dependencies]
 cortex-m = "0.7"
 cortex-m-rt = "0.7"
-embedded-hal = { version = "0.2.5", features = ["unproven"] }
+embedded_hal_0_2 = { package = "embedded-hal", version = "0.2.5", features = [
+  "unproven",
+] }
+embedded-hal = "1.0.0"
+embedded-hal-async = "1.0.0"
 
 defmt = "0.3"
 defmt-rtt = "0.4"
 defmt-test = "0.3.1"
 panic-probe = { version = "0.3", features = ["print-defmt"] }
 
 rp2040-hal = { path = "../rp2040-hal", features = [
-  "defmt",
   "critical-section-impl",
+  "defmt",
+  "rt",
+  "i2c-write-iter",
 ] }
 # Needed to set spi frequencies
 fugit = "0.3.6"
 
 rp2040-boot2 = "0.3.0"
 critical-section = "1.0.0"
+heapless = { version = "0.8.0", features = [
+  "portable-atomic-critical-section",
+  "defmt-03",
+] }
+# - `wfe`: we may want to signal between cores with sev
+# - `wfe` implies `cortex-m`
+nostd_async = { version = "0.6.1", features = ["wfe"] }
+futures = { version = "0.3.30", default-features = false, features = [
+  "async-await",
+] }
+i2c-write-iter = "1.0.0"
+itertools = { version = "0.12.0", default-features = false }
+portable-atomic = { version = "1.6.0", features = ["critical-section"] }

on-target-tests/tests/i2c_loopback.rs

@@ -0,0 +1,133 @@
+//! This test needs a connection between:
+//!
+//! | from GPIO (pico Pin) | to GPIO (pico Pin) |
+//! | -------------------- | ------------------ |
+//! |         0 (1)        |       2 (4)        |
+//! |         1 (2)        |       3 (5)        |
+
+#![no_std]
+#![no_main]
+#![cfg(test)]
+
+use defmt_rtt as _; // defmt transport
+use defmt_test as _;
+use panic_probe as _;
+use rp2040_hal as hal; // memory layout // panic handler
+
+use hal::{async_utils::AsyncPeripheral, pac::interrupt};
+
+/// The linker will place this boot block at the start of our program image. We
+/// need this to help the ROM bootloader get our code up and running.
+/// Note: This boot block is not necessary when using a rp-hal based BSP
+/// as the BSPs already perform this step.
+#[link_section = ".boot2"]
+#[used]
+pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H;
+
+/// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust
+/// if your board has a different frequency
+const XTAL_FREQ_HZ: u32 = 12_000_000u32;
+
+pub mod i2c_tests;
+
+#[interrupt]
+unsafe fn I2C0_IRQ() {
+    i2c_tests::Controller::on_interrupt();
+}
+
+#[interrupt]
+unsafe fn I2C1_IRQ() {
+    i2c_tests::blocking::peripheral_handler();
+}
+
+#[defmt_test::tests]
+mod tests {
+    use crate::i2c_tests::{self, blocking::State, ADDR_10BIT, ADDR_7BIT};
+
+    #[init]
+    fn setup() -> State {
+        i2c_tests::blocking::setup(super::XTAL_FREQ_HZ, ADDR_7BIT)
+    }
+
+    #[test]
+    fn write(state: &mut State) {
+        i2c_tests::blocking::write(state, ADDR_7BIT);
+        i2c_tests::blocking::write(state, ADDR_10BIT);
+    }
+
+    #[test]
+    fn write_iter(state: &mut State) {
+        i2c_tests::blocking::write_iter(state, ADDR_7BIT);
+        i2c_tests::blocking::write_iter(state, ADDR_10BIT);
+    }
+
+    #[test]
+    fn write_iter_read(state: &mut State) {
+        i2c_tests::blocking::write_iter_read(state, ADDR_7BIT, 1..=1);
+        i2c_tests::blocking::write_iter_read(state, ADDR_10BIT, 2..=2);
+    }
+
+    #[test]
+    fn write_read(state: &mut State) {
+        i2c_tests::blocking::write_read(state, ADDR_7BIT, 1..=1);
+        i2c_tests::blocking::write_read(state, ADDR_10BIT, 2..=2);
+    }
+
+    #[test]
+    fn read(state: &mut State) {
+        i2c_tests::blocking::read(state, ADDR_7BIT, 0..=0);
+        i2c_tests::blocking::read(state, ADDR_10BIT, 1..=1);
+    }
+
+    #[test]
+    fn transactions_read(state: &mut State) {
+        i2c_tests::blocking::transactions_read(state, ADDR_7BIT, 0..=0);
+        i2c_tests::blocking::transactions_read(state, ADDR_10BIT, 1..=1);
+    }
+
+    #[test]
+    fn transactions_write(state: &mut State) {
+        i2c_tests::blocking::transactions_write(state, ADDR_7BIT);
+        i2c_tests::blocking::transactions_write(state, ADDR_10BIT);
+    }
+
+    #[test]
+    fn transactions_read_write(state: &mut State) {
+        i2c_tests::blocking::transactions_read_write(state, ADDR_7BIT, 1..=1);
+        i2c_tests::blocking::transactions_read_write(state, ADDR_10BIT, 2..=2);
+    }
+
+    #[test]
+    fn transactions_write_read(state: &mut State) {
+        i2c_tests::blocking::transactions_write_read(state, ADDR_7BIT, 1..=1);
+        i2c_tests::blocking::transactions_write_read(state, ADDR_10BIT, 2..=2);
+    }
+
+    #[test]
+    fn transaction(state: &mut State) {
+        i2c_tests::blocking::transaction(state, ADDR_7BIT, 7..=9);
+        i2c_tests::blocking::transaction(state, ADDR_10BIT, 7..=9);
+    }
+
+    #[test]
+    fn transactions_iter(state: &mut State) {
+        i2c_tests::blocking::transactions_iter(state, ADDR_7BIT, 1..=1);
+        i2c_tests::blocking::transactions_iter(state, ADDR_10BIT, 2..=2);
+    }
+
+    #[test]
+    fn embedded_hal(state: &mut State) {
+        i2c_tests::blocking::embedded_hal(state, ADDR_7BIT, 2..=2);
+        i2c_tests::blocking::embedded_hal(state, ADDR_10BIT, 2..=7);
+    }
+
+    // Sad paths:
+    // invalid tx buf on write
+    // invalid rx buf on read
+    //
+    // invalid (rx/tx) buf in transactions
+    //
+    // Peripheral Nack
+    //
+    // Arbritration conflict
+}

on-target-tests/tests/i2c_loopback_async.rs

@@ -0,0 +1,76 @@
+//! This test needs a connection between:
+//!
+//! | from GPIO (pico Pin) | to GPIO (pico Pin) |
+//! | -------------------- | ------------------ |
+//! |         0 (1)        |       2 (4)        |
+//! |         1 (2)        |       3 (5)        |
+
+#![no_std]
+#![no_main]
+#![cfg(test)]
+
+use defmt_rtt as _; // defmt transport
+use defmt_test as _;
+use panic_probe as _;
+use rp2040_hal as hal; // memory layout // panic handler
+
+use hal::{async_utils::AsyncPeripheral, pac::interrupt};
+
+/// The linker will place this boot block at the start of our program image. We
+/// need this to help the ROM bootloader get our code up and running.
+/// Note: This boot block is not necessary when using a rp-hal based BSP
+/// as the BSPs already perform this step.
+#[link_section = ".boot2"]
+#[used]
+pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H;
+
+/// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust
+/// if your board has a different frequency
+const XTAL_FREQ_HZ: u32 = 12_000_000u32;
+
+pub mod i2c_tests;
+
+#[interrupt]
+unsafe fn I2C0_IRQ() {
+    i2c_tests::Controller::on_interrupt();
+}
+
+#[interrupt]
+unsafe fn I2C1_IRQ() {
+    i2c_tests::Target::on_interrupt();
+}
+
+#[defmt_test::tests]
+mod tests {
+    use crate::i2c_tests::{
+        non_blocking::{self, run_test, State},
+        ADDR_10BIT, ADDR_7BIT,
+    };
+
+    #[init]
+    fn setup() -> State {
+        non_blocking::setup(super::XTAL_FREQ_HZ, ADDR_7BIT)
+    }
+
+    #[test]
+    fn embedded_hal(state: &mut State) {
+        run_test(non_blocking::embedded_hal(state, ADDR_7BIT, 2..=2));
+        run_test(non_blocking::embedded_hal(state, ADDR_10BIT, 2..=7));
+    }
+
+    #[test]
+    fn transations_iter(state: &mut State) {
+        run_test(non_blocking::transaction(state, ADDR_7BIT, 7..=9));
+        run_test(non_blocking::transaction(state, ADDR_10BIT, 7..=14));
+    }
+
+    // Sad paths:
+    // invalid tx buf on write
+    // invalid rx buf on read
+    //
+    // invalid (rx/tx) buf in transactions
+    //
+    // Peripheral Nack
+    //
+    // Arbritration conflict
+}