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Add tests for Ssqosid extension #420

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Add tests for Ssqosid extension #420

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4441e76
refresh encoding.h
ved-rivos Dec 29, 2023
5037326
add csr_comb test macros
ved-rivos Dec 29, 2023
d3c2e1c
add CGF for Ssqosid CSR srmcfg
ved-rivos Dec 29, 2023
5abe001
add srmcfg CSR tests
ved-rivos Dec 29, 2023
66bc709
update changelog
ved-rivos Dec 29, 2023
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3 changes: 3 additions & 0 deletions CHANGELOG.md
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Original file line number Diff line number Diff line change
@@ -1,5 +1,8 @@
# CHANGELOG

## [3.8.7] -- 2023-12-29
- Add Ssqosid extension tests

## [3.8.6] -- 2013-12-24
- Fixed check ISA fields to include 32/64 in Zca and CMO tests. Note that the riscv-ctg CGFs have not been updated.
- Fixed check ISA fields in rv32e_m/B/src/ror-01 and rori-01 that listed I instead of E. Again, CGF has not been updated.
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77 changes: 77 additions & 0 deletions coverage/srmcfg.cgf
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Original file line number Diff line number Diff line change
@@ -0,0 +1,77 @@
srmcfg:
config:
- check ISA:=regex(.*I.*Zicsr.*Ssqosid.*); def rvtest_mtrap_routine=True
isa:
- I_Zicsr_Ssqosid
csr_comb:
'CSR_SRMCFG & 0x0FFF0FFF == 0x00000001': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x00000003': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x00000007': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0000000F': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0000001F': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0000003F': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0000007F': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x000000FF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x000001FF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x000003FF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x000007FF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x00000FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x00010FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x00030FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x00070FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x000F0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x001F0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x003F0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x007F0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x00FF0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x01FF0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x03FF0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0FFE': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0FFC': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0FF8': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0FF0': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0FE0': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0FC0': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0F80': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0F00': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0E00': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0C00': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0800': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0000': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFE0000': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFC0000': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FF80000': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FF00000': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FE00000': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FC00000': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0F800000': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0F000000': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0E000000': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0C000000': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x08000000': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x00000000': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0FFD': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0FFB': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0FF7': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0FEF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0FDF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0FBF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0F7F': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0EFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0DFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0BFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF07FF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFE0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFD0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFB0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FF70FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FEF0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FDF0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FBF0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0F7F0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0EFF0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0DFF0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0BFF0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x07FF0FFF': 0
'CSR_SRMCFG & 0x0FFF0FFF == 0x0FFF0FFF': 0

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