armstub7: Configure the top 32 STB interrupts

Prior to this commit, only 6 of the IGROUP registers were initialised, making it impossible to use the top 32 STB interrupts, including the USB1 XHCI interface. Configure all 8, like the armstub8 does. N.B. armstub8-32-gic.bin is now full, pending further optimisations. Signed-off-by: Phil Elwell <[email protected]>
raspberrypi · Aug 3, 2020 · 0c39cb5 · 0c39cb5
1 parent 86d54c6
commit 0c39cb5
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/armstubs/armstub7.S b/armstubs/armstub7.S
@@ -115,6 +115,7 @@ setup_gic:				@ Called from secure mode - set all interrupts to group 1 and enab
 	strd    r0, r1, [r2,#(GICD_IGROUPR)]!	@ update to bring the CPU registers within range
 	strd    r0, r1, [r2,#8]
 	strd    r0, r1, [r2,#16]
+	strd    r0, r1, [r2,#24]
 
 	movw	r1, #0x1e7
 	str	r1, [r2, #(GIC_CPUB_offset - GICD_IGROUPR) ]! @ Enable group  1 IRQs from CPU interface