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Release v0.2.12
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Signed-off-by: Nils Wistoff <[email protected]>
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niwis committed Aug 11, 2023
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Expand Up @@ -4,6 +4,10 @@ All notable changes to this project will be documented in this file.
The format is based on [Keep a Changelog](http://keepachangelog.com/en/1.0.0/)
and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.html).

## 0.2.12 - 2023-08-12
### Changed
- `tc_sram_xilinx`: Support ByteWidth != 8

## 0.2.11 - 2022-12-12
### Added
- `tc_clk_or2`: A new generic tech cell for balanced clock OR-gates.
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