Implement full mtval
#2969
main.yml
on: pull_request
Synthesize full core
27s
Build regression tests (riscv-tests)
39s
Build regression tests (riscv-arch-test)
41s
Run unit tests
6m 53s
Check code formatting and typing
46s
Run regression tests (riscv-tests)
3m 27s
Run regression tests (riscv-arch-test)
12m 20s
Artifacts
Produced during runtime
Name | Size | |
---|---|---|
verilog-full-core
|
349 KB |
|