2020 07 06 sync

Agenda

• Opens

• Enabling libraries in AOT mode (https://github.com/intel/llvm/pull/2012).

• Optimizations for SPIR target: use of vector types unsupported by the SPIR-V translator - <v6 x i32>.

• Patches in review for llorg:

  • https://reviews.llvm.org/D80932 - [SYCL] Make default address space a superset of OpenCL address spaces
    • First attempt to address Victor's comment and enable new behavior in SYCL mode only.

• GitHub issues/PRs

  • https://github.com/intel/llvm/issues/1799#issuecomment-637395726 - half implementation: __fp16 vs _Float16.
  • Mangling issues - https://github.com/intel/llvm/issues/2039
  • https://github.com/intel/llvm/issues/2041 - [SYCL][FE] Add an attribute to annotate special sycl types

• Back-burner

  • https://reviews.llvm.org/D71016 - [SYCL] Implement OpenCL kernel function generation
  • https://reviews.llvm.org/D77220 - [SYCL] Enable OpenCL types required for implementing the SYCL headers.

Meeting notes

Participants: Alexey Bader (Intel), Mariya Podchischaeva (Intel), Ronan Keryell (Xilinx), Nevin Liber (ANL), Michael Wong (Codeplay), Hal Finkel (ANL), Victor Lomuller (Codeplay)

• Enabling libraries in AOT mode (https://github.com/intel/llvm/pull/2012).

  • Alexey: this patch enables linking with C++ standard device library in AOT mode.
  • Alexey: Currently only module with JIT specific triple is compiled. This fix adds modules for X86, GPU and FPGA triples.
  • Hal: For OpenMP fat static libs, there is a patch series. One of them is D80816.

• Optimizations for SPIR target: use of vector types unsupported by the SPIR-V translator - <v6 x i32>.

  • Alexey: enabling optimizations causes new issues with the translation to SPIR-V format.
  • Alexey: in some cases InstCombine pass changes <3 x i64> type to <6 x i32>.
  • Alexey: Unfortunately there is no way to let LLVM passes know that <6 x i32> is unsupported by SPIR target.
  • Alexey: I've created an issue for SPIR-V translator tool - https://github.com/KhronosGroup/SPIRV-LLVM-Translator/issues/645
  • Hal: I think we can improve InstCombine pass avoid unsupported types. InstCombine tries to make LLVM IR in canonical form. What should be a canonical form in this case?
  • Hal: In addition to that SPIR-V translator should be improved to handle any vector type.
  • Alexey: There was similar issue with the integer type widths and I was able to handle it by setting "natively" supported integer type widths via data layout string.
  • Hal: We can consider improving data layout with natively supported vector widths as well.

• Patches in review for llorg:

  • https://reviews.llvm.org/D80932 - [SYCL] Make default address space a superset of OpenCL address spaces
    • First attempt to address Victor's comment and enable new behavior in SYCL mode only.
    • Alexey: The change reducing the scope of address space change to SYCL compilation mode is quite intrusive. I think it might easier to add SYCL specific address spaces.
    • Ronan: Let's existing address space attribute + use a number.
    • Victor: target address space pointers can't be casted to raw pointers.
    • Roland: we will need to enable most of the OpenCL address space attribute checks for SYCL attributes if not all of them.
    • Alexey: yes.