Skip to content

Commit

Permalink
Add UART_BUFFER exit handler for each architecture
Browse files Browse the repository at this point in the history
  • Loading branch information
nathanwhyte authored and jounathaen committed Jun 2, 2023
1 parent a3844ec commit a4251f5
Show file tree
Hide file tree
Showing 5 changed files with 18 additions and 5 deletions.
1 change: 1 addition & 0 deletions src/linux/vcpu.rs
Original file line number Diff line number Diff line change
Expand Up @@ -378,6 +378,7 @@ impl VirtualCPU for UhyveCPU {
Hypercall::FileWrite(syswrite) => self.write(syswrite)?,
Hypercall::FileUnlink(sysunlink) => self.unlink(sysunlink),
Hypercall::SerialWriteByte(buf) => self.uart(&[buf])?,
Hypercall::SerialWriteBuffer(sysserialwrite) => self.uart_buffer(sysserialwrite)?,
_ => panic!("Got unknown hypercall {:?}", hypercall),
};
} else {
Expand Down
7 changes: 7 additions & 0 deletions src/macos/aarch64/vcpu.rs
Original file line number Diff line number Diff line change
Expand Up @@ -187,6 +187,13 @@ impl VirtualCPU for UhyveCPU {

self.uart(&[x8]).unwrap();
}
Hypercall::SerialWriteBuffer(sysserialwrite) => {
let data_addr = self.vcpu.read_register(Register::X8)?;
let sysuart = unsafe {
&*(self.host_address(data_addr as usize) as *const SysUart)
};
self.uart_buffer(sysuart).unwrap();
}
Hypercall::Exit(sysexit) => {
return Ok(VcpuStopReason::Exit(self.exit(sysexit)));
}
Expand Down
4 changes: 4 additions & 0 deletions src/macos/x86_64/vcpu.rs
Original file line number Diff line number Diff line change
Expand Up @@ -768,6 +768,10 @@ impl VirtualCPU for UhyveCPU {
let al = (self.vcpu.read_register(&Register::RAX)? & 0xFF) as u8;
self.uart(&[al]).unwrap();
}
Hypercall::SerialWriteBuffer(sysserialwrite) => {
self.uart_buffer(sysserialwrite).unwrap();
}

_ => panic!("Got unknown hypercall {:?}", hypercall),
}
self.vcpu.write_register(&Register::RIP, rip + len)?;
Expand Down
7 changes: 4 additions & 3 deletions src/vm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -119,7 +119,7 @@ pub trait VirtualCPU {
Hypercall::Cmdval(syscmdval)
}
HypercallAddress::Uart => Hypercall::SerialWriteByte(data as u8),
HypercallAddress::SerialWriteBuffer => {
HypercallAddress::SerialBufferWrite => {
let syscmdval = unsafe { &*(self.host_address(data) as *const SerialWriteBufferParams) };
Hypercall::SerialWriteBuffer(syscmdval)
}
Expand Down Expand Up @@ -303,8 +303,9 @@ pub trait VirtualCPU {
}

/// Handles a UART syscall by contructing a buffer from parameter
fn uart_buffer(&self, sysuart: &SysUart) -> io::Result<()> {
let buf_addr = self.virt_to_phys(sysuart.buf as usize) as *const u8;
fn uart_buffer(&self, sysuart: &SerialWriteBufferParams) -> io::Result<()> {
let buf_addr = self.virt_to_phys(sysuart.buf.as_u64() as usize) as *const u8;
// TODO: Check that we don't have an out ouf bounds read (stay inside vm memory)
let buf = unsafe { std::slice::from_raw_parts(buf_addr, sysuart.len) };
io::stdout().write_all(buf)
}
Expand Down
4 changes: 2 additions & 2 deletions uhyve-interface/src/parameters.rs
Original file line number Diff line number Diff line change
Expand Up @@ -112,6 +112,6 @@ pub struct LseekParams {
#[repr(C, packed)]
#[derive(Debug, Copy, Clone)]
pub struct SerialWriteBufferParams {
buf: PhysAddr,
len: usize,
pub buf: PhysAddr,
pub len: usize,
}

0 comments on commit a4251f5

Please sign in to comment.