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Add std/math/hardware.d support for LoongArch64. #8850

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Nov 17, 2023
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Add std/math/hardware.d support for LoongArch64. #8850

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58 changes: 58 additions & 0 deletions std/math/hardware.d
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Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,7 @@ version (SPARC64) version = SPARC_Any;
version (SystemZ) version = IBMZ_Any;
version (RISCV32) version = RISCV_Any;
version (RISCV64) version = RISCV_Any;
version (LoongArch64) version = LoongArch_Any;

version (D_InlineAsm_X86) version = InlineAsm_X86_Any;
version (D_InlineAsm_X86_64) version = InlineAsm_X86_Any;
Expand Down Expand Up @@ -57,6 +58,7 @@ else version (X86_Any) version = IeeeFlagsSupport;
else version (PPC_Any) version = IeeeFlagsSupport;
else version (RISCV_Any) version = IeeeFlagsSupport;
else version (MIPS_Any) version = IeeeFlagsSupport;
else version (LoongArch_Any) version = IeeeFlagsSupport;
else version (ARM_Any) version = IeeeFlagsSupport;

// Struct FloatingPointControl is only available if hardware FP units are available.
Expand Down Expand Up @@ -87,6 +89,7 @@ private:
// The ARM and PowerPC FPSCR is a 32-bit register.
// The SPARC FSR is a 32bit register (64 bits for SPARC 7 & 8, but high bits are uninteresting).
// The RISC-V (32 & 64 bit) fcsr is 32-bit register.
// THe LoongArch fcsr (fcsr0) is a 32-bit register.
uint flags;

version (CRuntime_Microsoft)
Expand Down Expand Up @@ -159,6 +162,15 @@ private:
return result;
`);
}
else version (LoongArch_Any)
{
uint result = void;
asm pure nothrow @nogc
{
"movfcsr2gr %0,$r2" : "=r" (result);
}
return result & EXCEPTIONS_MASK;
}
Comment on lines +165 to +173
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@ibuclaw ibuclaw Nov 17, 2023 •
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Is there a reason why this differs from the patch posted to gcc-patches? What gets downstreamed to gdc would preferably be an identical copy, otherwise it risks being overwritten when I next do an automatic sync.

else
assert(0, "Not yet supported");
}
Expand Down Expand Up @@ -191,6 +203,13 @@ private:
}
`);
}
else version (LoongArch_Any)
{
asm nothrow @nogc
{
"movgr2fcsr $r2,$r0";
}
}
else
{
/* SPARC:
Expand Down Expand Up @@ -613,6 +632,21 @@ nothrow @nogc:
| inexactException,
}
}
else version (LoongArch_Any)
{
enum : ExceptionMask
{
inexactException = 0x00,
divByZeroException = 0x01,
overflowException = 0x02,
underflowException = 0x04,
invalidException = 0x08,
severeExceptions = overflowException | divByZeroException
| invalidException,
allExceptions = severeExceptions | underflowException
| inexactException,
}
}
else version (MIPS_Any)
{
enum : ExceptionMask
Expand Down Expand Up @@ -700,6 +734,8 @@ nothrow @nogc:
return true;
else version (MIPS_Any)
return true;
else version (LoongArch_Any)
return true;
else version (ARM_Any)
{
// The hasExceptionTraps_impl function is basically pure,
Expand Down Expand Up @@ -773,6 +809,10 @@ private:
{
alias ControlState = uint;
}
else version (LoongArch_Any)
{
alias ControlState = uint;
}
else version (MIPS_Any)
{
alias ControlState = uint;
Expand Down Expand Up @@ -844,6 +884,16 @@ private:
return cont;
`);
}
else version (LoongArch_Any)
{
ControlState cont;
asm pure nothrow @nogc
{
"movfcsr2gr %0,$r0" : "=r" (cont);
}
cont &= (roundingMask | allExceptions);
return cont;
}
else
assert(0, "Not yet supported");
}
Expand Down Expand Up @@ -887,6 +937,14 @@ private:
}
`);
}
else version (LoongArch_Any)
{
asm nothrow @nogc
{
"movgr2fcsr $r0,%0" :
: "r" (newState & (roundingMask | allExceptions));
}
}
else
assert(0, "Not yet supported");
}
Expand Down