Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

chore: Fix compile errors on rustc nightly #763

Open
wants to merge 1 commit into
base: master
Choose a base branch
from
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
6 changes: 3 additions & 3 deletions atsamd-hal-macros/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -70,11 +70,11 @@ fn hal_cfg_impl(args: TokenStream) -> Result<Group, Error> {
/// "nvmctrl-d5x" => "calibration/d5x.rs",
/// )]
/// pub mod calibration {}

///
/// #[hal_module("aes")
/// pub mod aes {}
/// ```
///
///
/// This will then expand to something of the form:
/// ```ignore
/// #[cfg(any(feature = "samd11c", ...))]
Expand All @@ -88,7 +88,7 @@ fn hal_cfg_impl(args: TokenStream) -> Result<Group, Error> {
/// #[cfg(any(feature = "samd51g", ...))]
/// pub mod aes;
/// ```
///
///
/// Ideally you would be to write `pub mod calibration;` instead of
/// `pub mod calibration {}`, but unfortunately non-inline modules are not
/// currently supposed in proc macros. See
Expand Down
9 changes: 6 additions & 3 deletions hal/src/dmac/dma_controller.rs
Original file line number Diff line number Diff line change
Expand Up @@ -158,15 +158,18 @@ impl DmaController {

Self::swreset(&mut dmac);

// SAFETY this is safe because we write a whole u32 to 32-bit registers,
// SAFETY:
//
// This is safe because we write a whole u32 to 32-bit registers,
// and the descriptor array addesses will never change since they are static.
// We just need to ensure the writeback and descriptor_section addresses
// are valid.
#[allow(static_mut_refs)]
unsafe {
dmac.baseaddr()
.write(|w| w.baseaddr().bits(DESCRIPTOR_SECTION.as_ptr() as u32));
.write(|w| w.baseaddr().bits(DESCRIPTOR_SECTION.as_mut_ptr() as u32));
dmac.wrbaddr()
.write(|w| w.wrbaddr().bits(WRITEBACK.as_ptr() as u32));
.write(|w| w.wrbaddr().bits(WRITEBACK.as_mut_ptr() as u32));
}

// ----- Select priority levels ----- //
Expand Down
4 changes: 2 additions & 2 deletions hal/src/dmac/transfer.rs
Original file line number Diff line number Diff line change
Expand Up @@ -648,7 +648,7 @@ where
}

/// Modify a completed transfer with a new `destination`, then restart.

///
/// Returns a Result containing the destination from the
/// completed transfer. Returns `Err(_)` if the buffer lengths are
/// mismatched or if the previous transfer has not yet completed.
Expand All @@ -673,7 +673,7 @@ where
}

/// Modify a completed transfer with a new `source`, then restart.

///
/// Returns a Result containing the source from the
/// completed transfer. Returns `Err(_)` if the buffer lengths are
/// mismatched or if the previous transfer has not yet completed.
Expand Down
Loading