[aievec] Fix xfer inboud attributes (#1668)

Xilinx · Aug 7, 2024 · 81b089a · 81b089a
1 parent b8a4890
commit 81b089a
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Showing 3 changed files with 7 additions and 4 deletions.
diff --git a/lib/Dialect/AIEVec/Transforms/ConvertVectorToAIEVec.cpp b/lib/Dialect/AIEVec/Transforms/ConvertVectorToAIEVec.cpp
@@ -54,9 +54,12 @@ struct SetInboundsToReadStoreOpPattern : public RewritePattern {
     // TODO: We are currently setting all `vector.transfer_read` and
     // TODO: `vector.transfer_write` as "in bounds". We need to add
     // TODO: an analysis to verify that this is true before doing so.
-    if (writeOrReadOp.getInBounds() || writeOrReadOp.getTransferRank() == 0) {
+    auto inBounds =
+        writeOrReadOp.getInBounds().template getAsValueRange<BoolAttr>();
+    if (std::all_of(inBounds.begin(), inBounds.end(),
+                    [](bool v) { return v; }) ||
+        writeOrReadOp.getTransferRank() == 0)
       return failure();
-    }
 
     SmallVector<bool, 4> bools(writeOrReadOp.getTransferRank(), true);
     auto inBoundsAttr = rewriter.getBoolArrayAttr(bools);

diff --git a/test/Conversion/VectorToAIEVec/gemm64_int16_unroll16_vectorized.mlir b/test/Conversion/VectorToAIEVec/gemm64_int16_unroll16_vectorized.mlir
@@ -234,7 +234,7 @@ func.func @matmul(%arg0: memref<?x64xi16>, %arg1: memref<?x64xi16>, %arg2: memre
         // CHECK: scf.yield %[[ACC]] : vector<16xi16>
         affine.yield %80 : vector<16xi16>
       }
-      // CHECK: vector.transfer_write %[[ACCn]], %[[MC]][%[[I]], %[[J]]] : vector<16xi16>, memref<?x64xi16>
+      // CHECK: vector.transfer_write %[[ACCn]], %[[MC]][%[[I]], %[[J]]] {in_bounds = [true]} : vector<16xi16>, memref<?x64xi16>
       vector.transfer_write %1, %arg2[%arg3, %arg4] : vector<16xi16>, memref<?x64xi16>
     }
   }

diff --git a/test/python/aievec.py b/test/python/aievec.py
@@ -291,7 +291,7 @@ def dut(A: T.tensor(1024, T.i8()), B: T.tensor(1024, T.i8())):
     # CHECK:     %0 = aievec.upd %arg0[%arg3] {index = 0 : i8, offset = 0 : i32} : memref<1024xi8>, vector<64xi8>
     # CHECK:     %1 = aievec.upd %arg1[%arg3] {index = 0 : i8, offset = 0 : i32} : memref<1024xi8>, vector<64xi8>
     # CHECK:     %2 = aievec.add_elem %0, %1 : vector<64xi8>
-    # CHECK:     vector.transfer_write %2, %arg2[%arg3] : vector<64xi8>, memref<1024xi8>
+    # CHECK:     vector.transfer_write %2, %arg2[%arg3] {in_bounds = [true]} : vector<64xi8>, memref<1024xi8>
     # CHECK:   }
     # CHECK:   return
     # CHECK: }