From 3ae43d6aee8be33ad185d243386920c63a939e94 Mon Sep 17 00:00:00 2001
From: Andrey Zgarbul <zgarbul.andrey@gmail.com>
Date: Thu, 25 Jul 2024 19:42:07 +0300
Subject: [PATCH] listen CTS

---
 CHANGELOG.md             |  4 +++-
 src/serial/uart_impls.rs | 13 +++++++++++++
 2 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 072a634b..0b31b619 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -9,7 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Added
 
- - Serial flow control enable
+ - Serial flow control enable [#775]
  - `i2c_scanner` example [#758]
  - Enable `sdio` for stm32f446
  - port LTDC implementation and example from stm32f7xx-hal [#731]
@@ -31,6 +31,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 [#758]: https://github.com/stm32-rs/stm32f4xx-hal/pull/758
 [#725]: https://github.com/stm32-rs/stm32f4xx-hal/pull/725
 
+[#775]: https://github.com/stm32-rs/stm32f4xx-hal/pull/775
+
 ## [v0.21.0] - 2024-05-30
 
 ### Changed
diff --git a/src/serial/uart_impls.rs b/src/serial/uart_impls.rs
index 683dbfc3..b654e65d 100644
--- a/src/serial/uart_impls.rs
+++ b/src/serial/uart_impls.rs
@@ -272,15 +272,22 @@ macro_rules! uartCommon {
 pub trait RBFlowControlImpl {
     fn enable_rts(&self, state: bool);
     fn enable_cts(&self, state: bool);
+    fn listen_cts(&self, state: bool);
 }
 
 impl RBFlowControlImpl for RegisterBlockUsart {
+    #[inline(always)]
     fn enable_rts(&self, state: bool) {
         self.cr3().modify(|_, w| w.rtse().bit(state));
     }
+    #[inline(always)]
     fn enable_cts(&self, state: bool) {
         self.cr3().modify(|_, w| w.ctse().bit(state));
     }
+    #[inline(always)]
+    fn listen_cts(&self, state: bool) {
+        self.cr3().modify(|_, w| w.ctsie().bit(state))
+    }
 }
 
 impl RegisterBlockImpl for RegisterBlockUsart {
@@ -573,6 +580,12 @@ where
     pub fn disable_clear_to_send(&mut self) {
         self.tx.usart.enable_cts(false);
     }
+    pub fn listen_clear_to_send(&mut self) {
+        self.tx.usart.listen_cts(true)
+    }
+    pub fn unlisten_clear_to_send(&mut self) {
+        self.tx.usart.listen_cts(false)
+    }
 }
 
 impl<UART: Instance, WORD> RxISR for Serial<UART, WORD>