From 4b8eb266204b26be267f8e420808f9b1af8df98e Mon Sep 17 00:00:00 2001 From: Jun Luo <4catcode@gmail.com> Date: Thu, 12 Sep 2024 15:38:05 +0800 Subject: [PATCH] Ok(w.write_all(&b)?) -> w.write_all(&b) --- lib/xdrgen/generators/rust/src/types.rs | 8 ++++---- spec/output/generator_spec_rust/block_comments.x/MyXDR.rs | 8 ++++---- spec/output/generator_spec_rust/const.x/MyXDR.rs | 8 ++++---- spec/output/generator_spec_rust/enum.x/MyXDR.rs | 8 ++++---- spec/output/generator_spec_rust/nesting.x/MyXDR.rs | 8 ++++---- spec/output/generator_spec_rust/optional.x/MyXDR.rs | 8 ++++---- spec/output/generator_spec_rust/struct.x/MyXDR.rs | 8 ++++---- spec/output/generator_spec_rust/test.x/MyXDR.rs | 8 ++++---- spec/output/generator_spec_rust/union.x/MyXDR.rs | 8 ++++---- .../block_comments.x/MyXDR.rs | 8 ++++---- .../const.x/MyXDR.rs | 8 ++++---- .../enum.x/MyXDR.rs | 8 ++++---- .../nesting.x/MyXDR.rs | 8 ++++---- .../optional.x/MyXDR.rs | 8 ++++---- .../struct.x/MyXDR.rs | 8 ++++---- .../test.x/MyXDR.rs | 8 ++++---- .../union.x/MyXDR.rs | 8 ++++---- .../block_comments.x/MyXDR.rs | 8 ++++---- .../generator_spec_rust_custom_str_impls/const.x/MyXDR.rs | 8 ++++---- .../generator_spec_rust_custom_str_impls/enum.x/MyXDR.rs | 8 ++++---- .../nesting.x/MyXDR.rs | 8 ++++---- .../optional.x/MyXDR.rs | 8 ++++---- .../struct.x/MyXDR.rs | 8 ++++---- .../generator_spec_rust_custom_str_impls/test.x/MyXDR.rs | 8 ++++---- .../generator_spec_rust_custom_str_impls/union.x/MyXDR.rs | 8 ++++---- 25 files changed, 100 insertions(+), 100 deletions(-) diff --git a/lib/xdrgen/generators/rust/src/types.rs b/lib/xdrgen/generators/rust/src/types.rs index 1614fba2..77f7e157 100644 --- a/lib/xdrgen/generators/rust/src/types.rs +++ b/lib/xdrgen/generators/rust/src/types.rs @@ -667,7 +667,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -690,7 +690,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -713,7 +713,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -736,7 +736,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust/block_comments.x/MyXDR.rs b/spec/output/generator_spec_rust/block_comments.x/MyXDR.rs index 9482a191..0b29ca06 100644 --- a/spec/output/generator_spec_rust/block_comments.x/MyXDR.rs +++ b/spec/output/generator_spec_rust/block_comments.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust/const.x/MyXDR.rs b/spec/output/generator_spec_rust/const.x/MyXDR.rs index 5463b6eb..9aeeac85 100644 --- a/spec/output/generator_spec_rust/const.x/MyXDR.rs +++ b/spec/output/generator_spec_rust/const.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust/enum.x/MyXDR.rs b/spec/output/generator_spec_rust/enum.x/MyXDR.rs index a0186d28..fcae9515 100644 --- a/spec/output/generator_spec_rust/enum.x/MyXDR.rs +++ b/spec/output/generator_spec_rust/enum.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust/nesting.x/MyXDR.rs b/spec/output/generator_spec_rust/nesting.x/MyXDR.rs index e6f36d9c..85425565 100644 --- a/spec/output/generator_spec_rust/nesting.x/MyXDR.rs +++ b/spec/output/generator_spec_rust/nesting.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust/optional.x/MyXDR.rs b/spec/output/generator_spec_rust/optional.x/MyXDR.rs index 6a953c99..5af74992 100644 --- a/spec/output/generator_spec_rust/optional.x/MyXDR.rs +++ b/spec/output/generator_spec_rust/optional.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust/struct.x/MyXDR.rs b/spec/output/generator_spec_rust/struct.x/MyXDR.rs index c10313f1..33ac78c6 100644 --- a/spec/output/generator_spec_rust/struct.x/MyXDR.rs +++ b/spec/output/generator_spec_rust/struct.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust/test.x/MyXDR.rs b/spec/output/generator_spec_rust/test.x/MyXDR.rs index 9386fcdb..89ff8657 100644 --- a/spec/output/generator_spec_rust/test.x/MyXDR.rs +++ b/spec/output/generator_spec_rust/test.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust/union.x/MyXDR.rs b/spec/output/generator_spec_rust/union.x/MyXDR.rs index b2ba8b91..6fffba78 100644 --- a/spec/output/generator_spec_rust/union.x/MyXDR.rs +++ b/spec/output/generator_spec_rust/union.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust_custom_jsonschema_impls/block_comments.x/MyXDR.rs b/spec/output/generator_spec_rust_custom_jsonschema_impls/block_comments.x/MyXDR.rs index 9482a191..0b29ca06 100644 --- a/spec/output/generator_spec_rust_custom_jsonschema_impls/block_comments.x/MyXDR.rs +++ b/spec/output/generator_spec_rust_custom_jsonschema_impls/block_comments.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust_custom_jsonschema_impls/const.x/MyXDR.rs b/spec/output/generator_spec_rust_custom_jsonschema_impls/const.x/MyXDR.rs index 5463b6eb..9aeeac85 100644 --- a/spec/output/generator_spec_rust_custom_jsonschema_impls/const.x/MyXDR.rs +++ b/spec/output/generator_spec_rust_custom_jsonschema_impls/const.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust_custom_jsonschema_impls/enum.x/MyXDR.rs b/spec/output/generator_spec_rust_custom_jsonschema_impls/enum.x/MyXDR.rs index c1949d87..5fa974da 100644 --- a/spec/output/generator_spec_rust_custom_jsonschema_impls/enum.x/MyXDR.rs +++ b/spec/output/generator_spec_rust_custom_jsonschema_impls/enum.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust_custom_jsonschema_impls/nesting.x/MyXDR.rs b/spec/output/generator_spec_rust_custom_jsonschema_impls/nesting.x/MyXDR.rs index 8da3e4ef..b2a55a35 100644 --- a/spec/output/generator_spec_rust_custom_jsonschema_impls/nesting.x/MyXDR.rs +++ b/spec/output/generator_spec_rust_custom_jsonschema_impls/nesting.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust_custom_jsonschema_impls/optional.x/MyXDR.rs b/spec/output/generator_spec_rust_custom_jsonschema_impls/optional.x/MyXDR.rs index 2a0294a0..93b4c17d 100644 --- a/spec/output/generator_spec_rust_custom_jsonschema_impls/optional.x/MyXDR.rs +++ b/spec/output/generator_spec_rust_custom_jsonschema_impls/optional.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust_custom_jsonschema_impls/struct.x/MyXDR.rs b/spec/output/generator_spec_rust_custom_jsonschema_impls/struct.x/MyXDR.rs index fa6dc947..d2b556b7 100644 --- a/spec/output/generator_spec_rust_custom_jsonschema_impls/struct.x/MyXDR.rs +++ b/spec/output/generator_spec_rust_custom_jsonschema_impls/struct.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust_custom_jsonschema_impls/test.x/MyXDR.rs b/spec/output/generator_spec_rust_custom_jsonschema_impls/test.x/MyXDR.rs index 05f26846..9ec0899e 100644 --- a/spec/output/generator_spec_rust_custom_jsonschema_impls/test.x/MyXDR.rs +++ b/spec/output/generator_spec_rust_custom_jsonschema_impls/test.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust_custom_jsonschema_impls/union.x/MyXDR.rs b/spec/output/generator_spec_rust_custom_jsonschema_impls/union.x/MyXDR.rs index 960a6148..7a821a2d 100644 --- a/spec/output/generator_spec_rust_custom_jsonschema_impls/union.x/MyXDR.rs +++ b/spec/output/generator_spec_rust_custom_jsonschema_impls/union.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust_custom_str_impls/block_comments.x/MyXDR.rs b/spec/output/generator_spec_rust_custom_str_impls/block_comments.x/MyXDR.rs index 9482a191..0b29ca06 100644 --- a/spec/output/generator_spec_rust_custom_str_impls/block_comments.x/MyXDR.rs +++ b/spec/output/generator_spec_rust_custom_str_impls/block_comments.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust_custom_str_impls/const.x/MyXDR.rs b/spec/output/generator_spec_rust_custom_str_impls/const.x/MyXDR.rs index 5463b6eb..9aeeac85 100644 --- a/spec/output/generator_spec_rust_custom_str_impls/const.x/MyXDR.rs +++ b/spec/output/generator_spec_rust_custom_str_impls/const.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust_custom_str_impls/enum.x/MyXDR.rs b/spec/output/generator_spec_rust_custom_str_impls/enum.x/MyXDR.rs index e90df36e..f2e00bb5 100644 --- a/spec/output/generator_spec_rust_custom_str_impls/enum.x/MyXDR.rs +++ b/spec/output/generator_spec_rust_custom_str_impls/enum.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust_custom_str_impls/nesting.x/MyXDR.rs b/spec/output/generator_spec_rust_custom_str_impls/nesting.x/MyXDR.rs index 89de975e..0d4877b6 100644 --- a/spec/output/generator_spec_rust_custom_str_impls/nesting.x/MyXDR.rs +++ b/spec/output/generator_spec_rust_custom_str_impls/nesting.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust_custom_str_impls/optional.x/MyXDR.rs b/spec/output/generator_spec_rust_custom_str_impls/optional.x/MyXDR.rs index 9ed8491d..f582ae46 100644 --- a/spec/output/generator_spec_rust_custom_str_impls/optional.x/MyXDR.rs +++ b/spec/output/generator_spec_rust_custom_str_impls/optional.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust_custom_str_impls/struct.x/MyXDR.rs b/spec/output/generator_spec_rust_custom_str_impls/struct.x/MyXDR.rs index f703197c..7097419d 100644 --- a/spec/output/generator_spec_rust_custom_str_impls/struct.x/MyXDR.rs +++ b/spec/output/generator_spec_rust_custom_str_impls/struct.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust_custom_str_impls/test.x/MyXDR.rs b/spec/output/generator_spec_rust_custom_str_impls/test.x/MyXDR.rs index 0eaaffb2..a5cc3187 100644 --- a/spec/output/generator_spec_rust_custom_str_impls/test.x/MyXDR.rs +++ b/spec/output/generator_spec_rust_custom_str_impls/test.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } diff --git a/spec/output/generator_spec_rust_custom_str_impls/union.x/MyXDR.rs b/spec/output/generator_spec_rust_custom_str_impls/union.x/MyXDR.rs index 971897b4..d30326f4 100644 --- a/spec/output/generator_spec_rust_custom_str_impls/union.x/MyXDR.rs +++ b/spec/output/generator_spec_rust_custom_str_impls/union.x/MyXDR.rs @@ -677,7 +677,7 @@ impl WriteXdr for i32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -700,7 +700,7 @@ impl WriteXdr for u32 { let b: [u8; 4] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -723,7 +723,7 @@ impl WriteXdr for i64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } } @@ -746,7 +746,7 @@ impl WriteXdr for u64 { let b: [u8; 8] = self.to_be_bytes(); w.with_limited_depth(|w| { w.consume_len(b.len())?; - Ok(w.write_all(&b)?) + w.write_all(&b) }) } }