From a70914636b5c82978c4bd282217d559a8dce65c4 Mon Sep 17 00:00:00 2001 From: rmsyn Date: Fri, 26 May 2023 04:33:19 +0000 Subject: [PATCH 1/4] update: update dependencies, remove bare_metal::Nr Updates cargo dependencies, and removes the deprecated `bare_metal::Nr` trait. The `bare_metal::Nr` is no longer present in the latest version, and all usage in this HAL are easily replaced by directly converting the `Interrupt` enum to a base integer type. --- Cargo.toml | 9 ++++-- src/eclic.rs | 79 ++++++++++++++++++++++++++-------------------------- src/gpio.rs | 2 +- src/rcu.rs | 6 ++-- 4 files changed, 50 insertions(+), 46 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 158fc8f..c972d51 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -10,14 +10,19 @@ license = "ISC" edition = "2018" [dependencies] -gd32vf103-pac = "0.4.0" -riscv = "0.6.0" +riscv = "0.10.1" nb = "0.1.2" void = { version = "1.0.2", default-features = false } cast = { version = "0.2.3", default-features = false } vcell = "0.1.2" embedded-dma = "0.1.2" +[dependencies.gd32vf103-pac] +# remove if/when upstream is updated +git = "https://github.com/rmsyn/gd32vf103-pac" +branch = "fixup/update" +features = ["critical-section"] + [dependencies.embedded-hal] version = "0.2.3" features = ["unproven"] diff --git a/src/eclic.rs b/src/eclic.rs index 071892c..6f73c75 100644 --- a/src/eclic.rs +++ b/src/eclic.rs @@ -1,5 +1,4 @@ -use crate::pac::ECLIC; -use riscv::interrupt::Nr; +use crate::pac::{ECLIC, Interrupt}; const EFFECTIVE_LEVEL_PRIORITY_BITS: u8 = 4; @@ -84,43 +83,43 @@ pub trait EclicExt { fn get_priority_bits() -> u8; /// Setup `interrupt` - fn setup(interrupt: I, tt: TriggerType, level: Level, priority: Priority); + fn setup(interrupt: Interrupt, tt: TriggerType, level: Level, priority: Priority); /// Enables `interrupt` - unsafe fn unmask(interrupt: I); + unsafe fn unmask(interrupt: Interrupt); /// Disables `interrupt` - fn mask(interrupt: I); + fn mask(interrupt: Interrupt); /// Checks if `interrupt` is enabled - fn is_enabled(interrupt: I) -> bool; + fn is_enabled(interrupt: Interrupt) -> bool; /// Forces `interrupt` into pending state - fn pend(interrupt: I); + fn pend(interrupt: Interrupt); /// Clears `interrupt`'s pending state - fn unpend(interrupt: I); + fn unpend(interrupt: Interrupt); /// Checks if `interrupt` is pending - fn is_pending(interrupt: I) -> bool; + fn is_pending(interrupt: Interrupt) -> bool; /// Set `interrupt` trigger type - fn set_trigger_type(interrupt: I, tt: TriggerType); + fn set_trigger_type(interrupt: Interrupt, tt: TriggerType); /// Get `interrupt` trigger type - fn get_trigger_type(interrupt: I) -> Option; + fn get_trigger_type(interrupt: Interrupt) -> Option; // Set `interrupt` level - fn set_level(interrupt: I, level: Level); + fn set_level(interrupt: Interrupt, level: Level); // Get `interrupt` level - fn get_level(interrupt: I) -> Level; + fn get_level(interrupt: Interrupt) -> Level; // Set `interrupt` priority - fn set_priority(interrupt: I, priority: Priority); + fn set_priority(interrupt: Interrupt, priority: Priority); // Get `interrupt` interrupt - fn get_priority(interrupt: I) -> Priority; + fn get_priority(interrupt: Interrupt) -> Priority; } impl EclicExt for ECLIC { @@ -181,7 +180,7 @@ impl EclicExt for ECLIC { EFFECTIVE_LEVEL_PRIORITY_BITS - Self::get_level_bits() } - fn setup(interrupt: I, tt: TriggerType, level: Level, priority: Priority) { + fn setup(interrupt: Interrupt, tt: TriggerType, level: Level, priority: Priority) { Self::mask(interrupt); Self::set_trigger_type(interrupt, tt); Self::set_level(interrupt, level); @@ -190,8 +189,8 @@ impl EclicExt for ECLIC { } #[inline] - unsafe fn unmask(interrupt: I) { - let nr = usize::from(interrupt.nr()); + unsafe fn unmask(interrupt: Interrupt) { + let nr = interrupt as usize; (*Self::ptr()).clicints[nr] .clicintie @@ -199,8 +198,8 @@ impl EclicExt for ECLIC { } #[inline] - fn mask(interrupt: I) { - let nr = usize::from(interrupt.nr()); + fn mask(interrupt: Interrupt) { + let nr = interrupt as usize; unsafe { (*Self::ptr()).clicints[nr] @@ -210,8 +209,8 @@ impl EclicExt for ECLIC { } #[inline] - fn is_enabled(interrupt: I) -> bool { - let nr = usize::from(interrupt.nr()); + fn is_enabled(interrupt: Interrupt) -> bool { + let nr = interrupt as usize; unsafe { (*Self::ptr()).clicints[nr] @@ -223,8 +222,8 @@ impl EclicExt for ECLIC { } #[inline] - fn pend(interrupt: I) { - let nr = usize::from(interrupt.nr()); + fn pend(interrupt: Interrupt) { + let nr = interrupt as usize; unsafe { (*Self::ptr()).clicints[nr] @@ -234,8 +233,8 @@ impl EclicExt for ECLIC { } #[inline] - fn unpend(interrupt: I) { - let nr = usize::from(interrupt.nr()); + fn unpend(interrupt: Interrupt) { + let nr = interrupt as usize; unsafe { (*Self::ptr()).clicints[nr] @@ -245,8 +244,8 @@ impl EclicExt for ECLIC { } #[inline] - fn is_pending(interrupt: I) -> bool { - let nr = usize::from(interrupt.nr()); + fn is_pending(interrupt: Interrupt) -> bool { + let nr = interrupt as usize; unsafe { (*Self::ptr()).clicints[nr] @@ -258,8 +257,8 @@ impl EclicExt for ECLIC { } #[inline] - fn set_trigger_type(interrupt: I, tt: TriggerType) { - let nr = usize::from(interrupt.nr()); + fn set_trigger_type(interrupt: Interrupt, tt: TriggerType) { + let nr = interrupt as usize; unsafe { (*Self::ptr()).clicints[nr] @@ -269,8 +268,8 @@ impl EclicExt for ECLIC { } #[inline] - fn get_trigger_type(interrupt: I) -> Option { - let nr = usize::from(interrupt.nr()); + fn get_trigger_type(interrupt: Interrupt) -> Option { + let nr = interrupt as usize; match unsafe { (*Self::ptr()).clicints[nr].clicintattr.read().trig().bits() } { 0 => Some(TriggerType::Level), @@ -281,8 +280,8 @@ impl EclicExt for ECLIC { } #[inline] - fn set_level(interrupt: I, level: Level) { - let nr = usize::from(interrupt.nr()); + fn set_level(interrupt: Interrupt, level: Level) { + let nr = interrupt as usize; let mut intctl = unsafe { (*Self::ptr()).clicints[nr] @@ -307,8 +306,8 @@ impl EclicExt for ECLIC { } #[inline] - fn get_level(interrupt: I) -> Level { - let nr = usize::from(interrupt.nr()); + fn get_level(interrupt: Interrupt) -> Level { + let nr = interrupt as usize; let intctl = unsafe { (*Self::ptr()).clicints[nr] @@ -325,8 +324,8 @@ impl EclicExt for ECLIC { } #[inline] - fn set_priority(interrupt: I, priority: Priority) { - let nr = usize::from(interrupt.nr()); + fn set_priority(interrupt: Interrupt, priority: Priority) { + let nr = interrupt as usize; let mut intctl = unsafe { (*Self::ptr()).clicints[nr] @@ -354,8 +353,8 @@ impl EclicExt for ECLIC { } #[inline] - fn get_priority(interrupt: I) -> Priority { - let nr = usize::from(interrupt.nr()); + fn get_priority(interrupt: Interrupt) -> Priority { + let nr = interrupt as usize; let intctl = unsafe { (*Self::ptr()).clicints[nr] diff --git a/src/gpio.rs b/src/gpio.rs index 8cced3c..7984d72 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -117,7 +117,7 @@ trait PeripheralAccess { let value = (bits as u32) << offset; let regs = Self::peripheral(); - interrupt::free(|_| { + interrupt::free(|| { if index < 8 { regs.ctl0.modify(|r, w| unsafe { w.bits((r.bits() & mask) | value) diff --git a/src/rcu.rs b/src/rcu.rs index 5aa694e..2203285 100644 --- a/src/rcu.rs +++ b/src/rcu.rs @@ -327,14 +327,14 @@ macro_rules! bus_enable { impl Enable for crate::pac::$PER { #[inline(always)] fn enable(rcu: &mut Rcu) { - interrupt::free(|_| { + interrupt::free(|| { rcu.regs.$apben.modify(|_, w| w.$peren().set_bit()); }); } #[inline(always)] fn disable(rcu: &mut Rcu) { - interrupt::free(|_| { + interrupt::free(|| { rcu.regs.$apben.modify(|_, w| w.$peren().clear_bit()); }); } @@ -350,7 +350,7 @@ macro_rules! bus { impl Reset for crate::pac::$PER { #[inline(always)] fn reset(rcu: &mut Rcu) { - interrupt::free(|_| { + interrupt::free(|| { rcu.regs.$apbrst.modify(|_, w| w.$perrst().set_bit()); rcu.regs.$apbrst.modify(|_, w| w.$perrst().clear_bit()); }); From 6306771931ac5c0c33c3faad1f6c5671e0a2347c Mon Sep 17 00:00:00 2001 From: rmsyn Date: Fri, 26 May 2023 05:19:59 +0000 Subject: [PATCH 2/4] eclic-mode-hack: add `zicsr` option Adds `.option +zicsr` to `eclic-mode-hack.S` to fix a failure to assemble with recent versions of `riscv64-unknown-elf-gcc` (e.g. 12.2.0). --- eclic-mode-hack.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/eclic-mode-hack.S b/eclic-mode-hack.S index 3ab85d4..73efeb8 100644 --- a/eclic-mode-hack.S +++ b/eclic-mode-hack.S @@ -22,6 +22,8 @@ #define MSTATUS_MIE 0x00000008 +.option arch, +zicsr + .macro DISABLE_MIE csrc CSR_MSTATUS, MSTATUS_MIE .endm From 6fce78cfe712a56e73b1fa8bd5bcfa1477c9b2fb Mon Sep 17 00:00:00 2001 From: rmsyn Date: Fri, 26 May 2023 05:22:47 +0000 Subject: [PATCH 3/4] gd32vf103xx-hal.a: update precompiled library Updates the precompiled `bin/gd32vf103xx-hal.a` part of the library. --- bin/gd32vf103xx-hal.a | Bin 5016 -> 5112 bytes 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/bin/gd32vf103xx-hal.a b/bin/gd32vf103xx-hal.a index 092b6bf558276933d8bea970e07f40e424b9041a..77d3c32f726346c6de6705fe26b22b14bdf8b45a 100644 GIT binary patch literal 5112 zcmeI0e{2&~9KgS~u{tNA*%j7I(-geW9LmxUl9NR|bW5JJc_kw1(g_z#JS-|xMS@M^DZOp&pQ#=-V z-^XK_ceJj^f57hvOa`LCnV{M*+Flet5ceb|6VXjGn^fh^mSj=`r))0lUU4r1_abmd z1Xknkalz!mlS@vir-#mLKRa@+V#+n`IbU;O&BfYF{>u$ls`4cG?fN%=jn?h;mj#Xl z{LRzN9W6Ina@zK`m9-yf_s6H>9f=!>(*N~q^Ht-N)E=#K2&AVG^VFd#PmibHt@L^N zWhF_}NwmGEQ&SNjUn+Ruj%C;?a&31ox>3`uI+Jo?Rz{F=A&;Gr$J!n23ElM z7xLM7+$E!ZWBNwxfCq7e{PZZ2;q#f7XL%YCa-je+eE|w_J*8P4oXE?VyP2;F<;3%$h?*L2IgJN`=TiQbqkJqn@K`;>uDNXJ5 z5c7p2!6-yy0cZ#ZAR1^h+d|DjIfL#DdNNp*K`+#YeXn59w!f%aOdOz>{v#|6JZOaZ|37G~)Q1K}OwCk2lYKPC7*VhRkV4=_vSL&rzN z6;unbAG7hGhvh-y<#@pK8D?pPfpCb}CHOFLrQoB)vfyLHZowyrJ%T5Q%@5`zu~*ce zCZ=aiOlL7mH3k|l@X|`b=c#^`;ETko1z#pMACRsRKO^dYB3>)_8u7D&e<7|Fe4Y3? z!G93f37(C&T*)VRKCxeL32{L1V&Zzi^t>Pi1(y>y2wqCOPVjQ#M!_<1NU)dKe1Ka; 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The generated assembly is different. This commit should be reverted if regressions are noticed on real hardware. --- assemble.sh | 11 -- bin/gd32vf103xx-hal.a | Bin 5112 -> 0 bytes build.rs | 21 --- eclic-mode-hack.S | 345 ------------------------------------------ src/eclic.rs | 4 + src/eclic/mode.rs | 264 ++++++++++++++++++++++++++++++++ 6 files changed, 268 insertions(+), 377 deletions(-) delete mode 100755 assemble.sh delete mode 100644 bin/gd32vf103xx-hal.a delete mode 100644 build.rs delete mode 100644 eclic-mode-hack.S create mode 100644 src/eclic/mode.rs diff --git a/assemble.sh b/assemble.sh deleted file mode 100755 index f0598ad..0000000 --- a/assemble.sh +++ /dev/null @@ -1,11 +0,0 @@ -#!/bin/bash - -set -euxo pipefail - -# remove existing blobs because otherwise this will append object files to the old blobs -rm -f bin/*.a - -riscv64-unknown-elf-gcc -c -mabi=ilp32 -march=rv32imac eclic-mode-hack.S -o bin/eclic-mode-hack.o -ar crs bin/gd32vf103xx-hal.a bin/eclic-mode-hack.o - -rm bin/eclic-mode-hack.o diff --git a/bin/gd32vf103xx-hal.a b/bin/gd32vf103xx-hal.a deleted file mode 100644 index 77d3c32f726346c6de6705fe26b22b14bdf8b45a..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 5112 zcmeI0e{2&~9KgS~u{tNA*%j7I(-geW9LmxUl9NR|bW5JJc_kw1(g_z#JS-|xMS@M^DZOp&pQ#=-V z-^XK_ceJj^f57hvOa`LCnV{M*+Flet5ceb|6VXjGn^fh^mSj=`r))0lUU4r1_abmd z1Xknkalz!mlS@vir-#mLKRa@+V#+n`IbU;O&BfYF{>u$ls`4cG?fN%=jn?h;mj#Xl z{LRzN9W6Ina@zK`m9-yf_s6H>9f=!>(*N~q^Ht-N)E=#K2&AVG^VFd#PmibHt@L^N zWhF_}NwmGEQ&SNjUn+Ruj%C;?a&31ox>3`uI+Jo?Rz{F=A&;Gr$J!n23ElM z7xLM7+$E!ZWBNwxfCq7e{PZZ2;q#f7XL%YCa-je+eE|w_J*8P4oXE?VyP2;F<;3%$h?*L2IgJN`=TiQbqkJqn@K`;>uDNXJ5 z5c7p2!6-yy0cZ#ZAR1^h+d|DjIfL#DdNNp*K`+#YeXn59w!f%aOdOz>{v#|6JZOaZ|37G~)Q1K}OwCk2lYKPC7*VhRkV4=_vSL&rzN z6;unbAG7hGhvh-y<#@pK8D?pPfpCb}CHOFLrQoB)vfyLHZowyrJ%T5Q%@5`zu~*ce zCZ=aiOlL7mH3k|l@X|`b=c#^`;ETko1z#pMACRsRKO^dYB3>)_8u7D&e<7|Fe4Y3? z!G93f37(C&T*)VRKCxeL32{L1V&Zzi^t>Pi1(y>y2wqCOPVjQ#M!_<1NU)dKe1Ka; zyk69=C2kVjNE{YS&lXa%;0SSx;23d4aDw;+!Sq#_*D4rX+UtFKvI9$96=k}J^^|5_?>`hy?1R$< zhuN3D64}qY)>cSAt67-qFjG1@8(<7edflM&sST@u)=Qp?nbKBKq>t1_X*uS6%>UMp zzQ)<}>qplyTZyhqsSa~?KcI