From fbd252d108231a1f36b23af7bdc3d8100a96c3e8 Mon Sep 17 00:00:00 2001
From: Thomas Benz <tbenz@iis.ee.ethz.ch>
Date: Wed, 3 Apr 2024 16:26:52 +0200
Subject: [PATCH 01/11] iDMA: Update SoC-level dma

---
 Bender.local                |   2 +-
 Bender.yml                  |   7 +-
 hw/occamy/occamy_soc.sv.tpl | 216 ++++++++++++++++++++++++++----------
 hw/occamy/occamy_top.sv.tpl |   4 +-
 target/sim/Makefile         |   2 +-
 5 files changed, 167 insertions(+), 64 deletions(-)

diff --git a/Bender.local b/Bender.local
index aa72d87c3..699e49faa 100644
--- a/Bender.local
+++ b/Bender.local
@@ -3,6 +3,6 @@
 # SPDX-License-Identifier: Apache-2.0
 
 overrides:
-  axi:                { git: https://github.com/pulp-platform/axi.git,                version: 0.39.0-beta.4 }
+  axi:                { git: https://github.com/pulp-platform/axi.git,                version: 0.39.2 }
   common_cells:       { git: https://github.com/pulp-platform/common_cells.git,       version: 1.31.1 }
   register_interface: { git: https://github.com/pulp-platform/register_interface.git, version: 0.4.2 }
diff --git a/Bender.yml b/Bender.yml
index 946c2704f..ec383709a 100644
--- a/Bender.yml
+++ b/Bender.yml
@@ -22,16 +22,17 @@ dependencies:
   apb:                    { git:  https://github.com/pulp-platform/apb.git,                version: 0.2.0 }
   apb_timer:              { git:  https://github.com/pulp-platform/apb_timer.git,          rev:     0cbc6cbc26c94b8e3bf27cc058c48ef89ea3d4c3 }
   apb_uart:               { git:  https://github.com/pulp-platform/apb_uart.git,           rev:     b6145341df79137ac584c83e9c081f80a7a40440 }
-  axi:                    { git:  https://github.com/pulp-platform/axi.git,                version: 0.39.0  }
+  axi:                    { git:  https://github.com/pulp-platform/axi.git,                version: 0.39.2  }
   axi_tlb:                { path: hw/vendor/pulp_platform_axi_tlb                                           }
   clint:                  { git:  https://github.com/pulp-platform/clint.git,              rev:     v0.1.0  }
   common_cells:           { git:  https://github.com/pulp-platform/common_cells.git,       rev:     v1.28.0 }
   cva6:                   { path: hw/vendor/openhwgroup_cva6                                                }
   opentitan_peripherals:  { path: hw/vendor/pulp_platform_opentitan_peripherals                             }
-  register_interface:     { git:  https://github.com/pulp-platform/register_interface.git, version: 0.3.8   }
-  snitch_cluster:         { git:  https://github.com/pulp-platform/snitch_cluster.git,     rev:     269830af872fa943d8b079470120d42d62e1cb69 }
+  register_interface:     { git:  https://github.com/pulp-platform/register_interface.git, version: 0.4.2   }
+  snitch_cluster:         { git:  https://github.com/pulp-platform/snitch_cluster.git,     rev:     883a0ab3ed67f1a16ec920d5e985ae2a0eba5003 }
   tech_cells_generic:     { git:  https://github.com/pulp-platform/tech_cells_generic.git, rev:     v0.2.11 }
   cluster_icache:         { git:  https://github.com/pulp-platform/cluster_icache.git,     version: 0.1.0   }
+  idma:                   { git:  https://github.com/pulp-platform/iDMA,                   version: 0.6.0   }
 
 workspace:
   package_links:
diff --git a/hw/occamy/occamy_soc.sv.tpl b/hw/occamy/occamy_soc.sv.tpl
index 4d25d5333..0d41b0f88 100644
--- a/hw/occamy/occamy_soc.sv.tpl
+++ b/hw/occamy/occamy_soc.sv.tpl
@@ -43,6 +43,7 @@
 `include "common_cells/registers.svh"
 `include "register_interface/typedef.svh"
 `include "axi/assign.svh"
+`include "idma/typedef.svh"
 
 module ${name}_soc
   import ${name}_pkg::*;
@@ -408,35 +409,66 @@ module ${name}_soc
 
   <% out_sys_idma_cfg = soc_narrow_xbar.__dict__["out_sys_idma_cfg"] \
   .atomic_adapter(context, filter=True, max_trans=max_trans_atop_filter_per, name="out_sys_idma_cfg_noatop", inst_name="i_out_sys_idma_cfg_atop_filter") \
+  .change_dw(context, 32, "out_sys_idma_cfg_dw") \
   %>\
 
-  // .change_dw(context, 32, "out_sys_idma_cfg_dw") \
-
   <% in_sys_idma_mst  = soc_wide_xbar.__dict__["in_sys_idma_mst"] %>\
 
-  // burst request
+  // local regbus definition
+  `REG_BUS_TYPEDEF_ALL(idma_cfg_reg_a${wide_in.aw}_d31, logic [${wide_in.aw-1}:0], logic [31:0], logic [7:0])
+
+  // iDMA types
+  localparam int unsigned iDMAStrbWidth = ${wide_in.dw} / 32'd8;
+  localparam int unsigned iDMAOffsetWidth = $clog2(iDMAStrbWidth);
+  localparam type idma_addr_t = logic[${wide_in.aw-1}:0];
+  localparam type idma_id_t = logic[${wide_in.iw-1}:0];
+  localparam type idma_tf_len_t = logic[${wide_in.aw-1}:0];
+  localparam type idma_tf_id_t = logic[31:0];
+
+  // iDMA backend types
+  `IDMA_TYPEDEF_OPTIONS_T(options_t, idma_id_t)
+  `IDMA_TYPEDEF_REQ_T(idma_req_t, idma_tf_len_t, idma_addr_t, options_t)
+  `IDMA_TYPEDEF_ERR_PAYLOAD_T(err_payload_t, idma_addr_t)
+  `IDMA_TYPEDEF_RSP_T(idma_rsp_t, err_payload_t)
+
+  // AXI meta channels
   typedef struct packed {
-    logic [${wide_in.iw-1}:0] id;
-    logic [${wide_in.aw-1}:0] src, dst;
-    logic [${wide_in.aw-1}:0] num_bytes;
-    axi_pkg::cache_t    cache_src, cache_dst;
-    axi_pkg::burst_t    burst_src, burst_dst;
-    logic               decouple_rw;
-    logic               deburst;
-    logic               serialize;
-  } idma_burst_req_t;
+    ${out_sys_idma_cfg.ar_chan_type()} ar_chan;
+  } axi_read_meta_channel_t;
 
-  // local regbus definition
-  `REG_BUS_TYPEDEF_ALL(idma_cfg_reg_a${wide_in.aw}_d64, logic [${wide_in.aw-1}:0], logic [63:0], logic [7:0])
+  typedef struct packed {
+    axi_read_meta_channel_t axi;
+  } read_meta_channel_t;
+
+  typedef struct packed {
+    ${out_sys_idma_cfg.aw_chan_type()} aw_chan;
+  } axi_write_meta_channel_t;
 
-  idma_burst_req_t idma_burst_req;
-  logic idma_be_valid;
-  logic idma_be_ready;
-  logic idma_be_idle;
-  logic idma_be_trans_complete;
+  typedef struct packed {
+    axi_write_meta_channel_t axi;
+  } write_meta_channel_t;
+
+  // internal AXI channels
+  ${in_sys_idma_mst.req_type()} idma_axi_read_req, idma_axi_write_req;
+  ${in_sys_idma_mst.rsp_type()} idma_axi_read_rsp, idma_axi_write_rsp;
+
+  // backend signals
+  idma_req_t idma_req, idma_req_fe;
+  logic idma_req_valid, idma_req_fe_valid;
+  logic idma_req_ready, idma_req_fe_ready;
 
-  idma_cfg_reg_a${wide_in.aw}_d64_req_t idma_cfg_reg_req;
-  idma_cfg_reg_a${wide_in.aw}_d64_rsp_t idma_cfg_reg_rsp;
+  // counter signals
+  logic idma_issue_id;
+  logic idma_retire_id;
+  idma_tf_id_t idma_next_id;
+  idma_tf_id_t idma_completed_id;
+
+  // busy signals
+  idma_pkg::idma_busy_t idma_busy;
+
+  // Regbus instance
+  idma_cfg_reg_a${wide_in.aw}_d32_req_t idma_cfg_reg_req;
+  idma_cfg_reg_a${wide_in.aw}_d32_rsp_t idma_cfg_reg_rsp;
 
   axi_to_reg #(
     .ADDR_WIDTH( ${out_sys_idma_cfg.aw}                 ),
@@ -445,8 +477,8 @@ module ${name}_soc
     .USER_WIDTH( ${out_sys_idma_cfg.uw}                 ),
     .axi_req_t ( ${out_sys_idma_cfg.req_type()}         ),
     .axi_rsp_t ( ${out_sys_idma_cfg.rsp_type()}         ),
-    .reg_req_t ( idma_cfg_reg_a${wide_in.aw}_d64_req_t  ),
-    .reg_rsp_t ( idma_cfg_reg_a${wide_in.aw}_d64_rsp_t  )
+    .reg_req_t ( idma_cfg_reg_a${wide_in.aw}_d32_req_t  ),
+    .reg_rsp_t ( idma_cfg_reg_a${wide_in.aw}_d32_rsp_t  )
   ) i_axi_to_reg_sys_idma_cfg (
     .clk_i,
     .rst_ni,
@@ -457,48 +489,118 @@ module ${name}_soc
     .reg_rsp_i  ( idma_cfg_reg_rsp               )
   );
 
-  idma_reg64_frontend #(
-    .DmaAddrWidth    ( 'd64                                  ),
-    .dma_regs_req_t  ( idma_cfg_reg_a${wide_in.aw}_d64_req_t ),
-    .dma_regs_rsp_t  ( idma_cfg_reg_a${wide_in.aw}_d64_rsp_t ),
-    .burst_req_t     ( idma_burst_req_t                      )
-  ) i_idma_reg64_frontend_sys_idma (
+  idma_reg64_1d # (
+    .NumRegs        ( 32'd1 ),
+    .NumStreams     ( 32'd1 ),
+    .IdCounterWidth ( 32'd32 ),
+    .reg_req_t      ( idma_cfg_reg_a${wide_in.aw}_d32_req_t ),
+    .reg_rsp_t      ( idma_cfg_reg_a${wide_in.aw}_d32_rsp_t ),
+    .dma_req_t      ( idma_req_t )
+  ) i_idma_reg64_1d (
+    .clk_i,
+    .rst_ni,
+    .dma_ctrl_req_i ( idma_cfg_reg_req ),
+    .dma_ctrl_rsp_o ( idma_cfg_reg_rsp ),
+    .dma_req_o      ( idma_req_fe ),
+    .req_valid_o    ( idma_req_fe_valid ),
+    .req_ready_i    ( idma_req_fe_ready ),
+    .next_id_i      ( idma_next_id ),
+    .stream_idx_o   ( /* NOT CONNECTED */ ),
+    .done_id_i      ( idma_completed_id ),
+    .busy_i         ( idma_busy ),
+    .midend_busy_i  ( 1'b0 )
+  );
+
+  stream_fifo_optimal_wrap #(
+    .Depth     ( 32'd16 ),
+    .type_t    ( idma_req_t ),
+    .PrintInfo ( 1'b0 )
+  ) i_stream_fifo_optimal_wrap (
+    .clk_i,
+    .rst_ni,
+    .testmode_i ( test_mode_i ),
+    .flush_i    ( 1'b0 ),
+    .usage_o    ( /* NC */ ),
+    .data_i     ( idma_req_fe ),
+    .valid_i    ( idma_req_fe_valid ),
+    .ready_o    ( idma_req_fe_ready ),
+    .data_o     ( idma_req ),
+    .valid_o    ( idma_req_valid ),
+    .ready_i    ( idma_req_ready )
+  );
+
+  idma_backend_rw_axi #(
+    .DataWidth            ( ${wide_in.dw-1} ),
+    .AddrWidth            ( ${wide_in.aw-1} ),
+    .UserWidth            ( ${wide_in.uw} ),
+    .AxiIdWidth           ( ${wide_in.iw-1} ),
+    .NumAxInFlight        ( 32'd64 ),
+    .BufferDepth          ( 32'd3 ),
+    .TFLenWidth           ( ${wide_in.aw-1} ),
+    .MemSysDepth          ( 32'd16 ),
+    .CombinedShifter      ( 1'b1 ),
+    .RAWCouplingAvail     ( 1'b1 ),
+    .MaskInvalidData      ( 1'b0 ),
+    .HardwareLegalizer    ( 1'b1 ),
+    .RejectZeroTransfers  ( 1'b1 ),
+    .ErrorCap             ( idma_pkg::NO_ERROR_HANDLING ),
+    .PrintFifoInfo        ( 1'b0 ),
+    .idma_req_t           ( idma_req_t ),
+    .idma_rsp_t           ( idma_rsp_t ),
+    .idma_eh_req_t        ( idma_pkg::idma_eh_req_t ),
+    .idma_busy_t          ( idma_pkg::idma_busy_t ),
+    .axi_req_t            ( ${in_sys_idma_mst.req_type()} ),
+    .axi_rsp_t            ( ${in_sys_idma_mst.rsp_type()} ),
+    .read_meta_channel_t  ( read_meta_channel_t ),
+    .write_meta_channel_t ( write_meta_channel_t )
+  ) i_idma_backend_rw_axi (
+    .clk_i,
+    .rst_ni,
+    .testmode_i      ( test_mode_i ),
+    .idma_req_i      ( idma_req ),
+    .req_valid_i     ( idma_req_valid ),
+    .req_ready_o     ( idma_req_ready ),
+    .idma_rsp_o      ( /* NC */ ),
+    .rsp_valid_o     ( idma_retire_id ),
+    .rsp_ready_i     ( 1'b1 ),
+    .idma_eh_req_i   ( '0 ),
+    .eh_req_valid_i  ( 1'b0 ),
+    .eh_req_ready_o  ( /* NC */ ),
+    .axi_read_req_o  ( idma_axi_read_req ),
+    .axi_read_rsp_i  ( idma_axi_read_rsp ),
+    .axi_write_req_o ( idma_axi_write_req ),
+    .axi_write_rsp_i ( idma_axi_write_rsp ),
+    .busy_o          ( idma_busy )
+  );
+
+  axi_rw_join #(
+    .axi_req_t  ( ${in_sys_idma_mst.req_type()} ),
+    .axi_resp_t ( ${in_sys_idma_mst.rsp_type()} )
+  ) i_axi_rw_join (
     .clk_i,
     .rst_ni,
-    .dma_ctrl_req_i   ( idma_cfg_reg_req       ),
-    .dma_ctrl_rsp_o   ( idma_cfg_reg_rsp       ),
-    .burst_req_o      ( idma_burst_req         ),
-    .valid_o          ( idma_be_valid          ),
-    .ready_i          ( idma_be_ready          ),
-    .backend_idle_i   ( idma_be_idle           ),
-    .trans_complete_i ( idma_be_trans_complete )
+    .slv_read_req_i   ( idma_axi_read_req  ),
+    .slv_read_resp_o  ( idma_axi_read_rsp  ),
+    .slv_write_req_i  ( idma_axi_write_req ),
+    .slv_write_resp_o ( idma_axi_write_rsp ),
+    .mst_req_o        ( ${in_sys_idma_mst.req_name()} ),
+    .mst_resp_i       ( ${in_sys_idma_mst.rsp_name()} )
   );
 
-  axi_dma_backend #(
-    .DataWidth      ( ${in_sys_idma_mst.dw}         ),
-    .AddrWidth      ( ${in_sys_idma_mst.aw}         ),
-    .IdWidth        ( ${in_sys_idma_mst.iw}         ),
-    .AxReqFifoDepth ( 'd64                          ),
-    .TransFifoDepth ( 'd16                          ),
-    .BufferDepth    ( 'd3                           ),
-    .axi_req_t      ( ${in_sys_idma_mst.req_type()} ),
-    .axi_res_t      ( ${in_sys_idma_mst.rsp_type()} ),
-    .burst_req_t    ( idma_burst_req_t              ),
-    .DmaIdWidth     ( 'd32                          ),
-    .DmaTracing     ( 1'b1                          )
-  ) i_axi_dma_backend_sys_idma (
+  idma_transfer_id_gen #(
+    .IdWidth ( 32'd32 )
+  ) i_idma_transfer_id_gen (
     .clk_i,
     .rst_ni,
-    .dma_id_i         ( 'd0                           ),
-    .axi_dma_req_o    ( ${in_sys_idma_mst.req_name()} ),
-    .axi_dma_res_i    ( ${in_sys_idma_mst.rsp_name()} ),
-    .burst_req_i      ( idma_burst_req                ),
-    .valid_i          ( idma_be_valid                 ),
-    .ready_o          ( idma_be_ready                 ),
-    .backend_idle_o   ( idma_be_idle                  ),
-    .trans_complete_o ( idma_be_trans_complete        )
+    .issue_i     ( idma_issue_id ),
+    .retire_i    ( idma_retire_id ),
+    .next_o      ( idma_next_id ),
+    .completed_o ( idma_completed_id )
   );
 
+  // issue ids
+  assign idma_issue_id = idma_req_valid & idma_req_ready;
+
   ///////////
   // HBM2e //
   ///////////
diff --git a/hw/occamy/occamy_top.sv.tpl b/hw/occamy/occamy_top.sv.tpl
index 4b2297ec7..78213c3c7 100644
--- a/hw/occamy/occamy_top.sv.tpl
+++ b/hw/occamy/occamy_top.sv.tpl
@@ -409,7 +409,7 @@ module ${name}_top
 
   assign sba_addr = sba_addr_long[${regbus_debug.aw-1}:0];
 
-  mem_to_axi_lite #(
+  axi_lite_from_mem #(
     .MemAddrWidth (${regbus_debug.aw}),
     .AxiAddrWidth (${regbus_debug.aw}),
     .DataWidth (${regbus_debug.dw}),
@@ -417,7 +417,7 @@ module ${name}_top
     .AxiProt ('0),
     .axi_req_t (${soc_periph_xbar.in_debug.req_type()}),
     .axi_rsp_t (${soc_periph_xbar.in_debug.rsp_type()})
-  ) i_mem_to_axi_lite (
+  ) i_axi_lite_from_mem (
     .clk_i (${regbus_debug.clk}),
     .rst_ni (${regbus_debug.rst}),
     .mem_req_i (sba_req),
diff --git a/target/sim/Makefile b/target/sim/Makefile
index 22a156647..3033ef0df 100644
--- a/target/sim/Makefile
+++ b/target/sim/Makefile
@@ -626,4 +626,4 @@ help:
 	@echo -e ""
 	@echo -e "Additional useful targets from the included Makefrag:"
 	@echo -e "${Blue}traces         ${Black}Generate the better readable traces in .logs/trace_hart_<hart_id>.txt with spike-dasm."
-	@echo -e "${Blue}annotate       ${Black}Annotate the better readable traces in .logs/trace_hart_<hart_id>.s with the source code related with the retired instructions."
+	@echo -e "${Blue}annotate       ${Black}Annotate the better readable traces in .logs/trace_hart_<hart_id>.s with the source code related with the retired instructions."
\ No newline at end of file

From 83727414edf70a88bf6c146a3f56e6c0423e02b5 Mon Sep 17 00:00:00 2001
From: Luca Colagrande <luca.colagrande3@gmail.com>
Date: Thu, 29 Aug 2024 17:03:31 +0200
Subject: [PATCH 02/11] hw: Fix typo in iDMA integration

---
 hw/occamy/occamy_soc.sv.tpl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/occamy/occamy_soc.sv.tpl b/hw/occamy/occamy_soc.sv.tpl
index 0d41b0f88..e745dc8db 100644
--- a/hw/occamy/occamy_soc.sv.tpl
+++ b/hw/occamy/occamy_soc.sv.tpl
@@ -415,7 +415,7 @@ module ${name}_soc
   <% in_sys_idma_mst  = soc_wide_xbar.__dict__["in_sys_idma_mst"] %>\
 
   // local regbus definition
-  `REG_BUS_TYPEDEF_ALL(idma_cfg_reg_a${wide_in.aw}_d31, logic [${wide_in.aw-1}:0], logic [31:0], logic [7:0])
+  `REG_BUS_TYPEDEF_ALL(idma_cfg_reg_a${wide_in.aw}_d32, logic [${wide_in.aw-1}:0], logic [31:0], logic [7:0])
 
   // iDMA types
   localparam int unsigned iDMAStrbWidth = ${wide_in.dw} / 32'd8;

From b5a52e0aebad0459976226dbb6051919f10ee1af Mon Sep 17 00:00:00 2001
From: Luca Colagrande <luca.colagrande3@gmail.com>
Date: Thu, 29 Aug 2024 19:30:22 +0200
Subject: [PATCH 03/11] snitch_cluster: Bump to include iDMA update

---
 Bender.lock | 30 +++++++++++++++++++++++++++++-
 Bender.yml  |  2 +-
 2 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/Bender.lock b/Bender.lock
index 8ac4057f4..cdd951a5c 100644
--- a/Bender.lock
+++ b/Bender.lock
@@ -36,6 +36,13 @@ packages:
     - axi
     - common_cells
     - common_verification
+  axi_stream:
+    revision: 54891ff40455ca94a37641b9da4604647878cc07
+    version: 0.1.1
+    source:
+      Git: https://github.com/pulp-platform/axi_stream.git
+    dependencies:
+    - common_cells
   axi_tlb:
     revision: null
     version: null
@@ -103,6 +110,26 @@ packages:
       Git: https://github.com/pulp-platform/fpu_div_sqrt_mvp.git
     dependencies:
     - common_cells
+  idma:
+    revision: c12caf59bb482fe44b27361f6924ad346b2d22fe
+    version: 0.6.3
+    source:
+      Git: https://github.com/pulp-platform/iDMA
+    dependencies:
+    - axi
+    - axi_stream
+    - common_cells
+    - common_verification
+    - obi
+    - register_interface
+  obi:
+    revision: 5321106817e177d6c16ecc4daa922b96b1bc946b
+    version: 0.1.5
+    source:
+      Git: https://github.com/pulp-platform/obi.git
+    dependencies:
+    - common_cells
+    - common_verification
   opentitan_peripherals:
     revision: null
     version: null
@@ -136,7 +163,7 @@ packages:
       Git: https://github.com/pulp-platform/scm.git
     dependencies: []
   snitch_cluster:
-    revision: 269830af872fa943d8b079470120d42d62e1cb69
+    revision: da57b043dfe0ba563a55a9d83bf362873c713648
     version: null
     source:
       Git: https://github.com/pulp-platform/snitch_cluster.git
@@ -146,6 +173,7 @@ packages:
     - cluster_icache
     - common_cells
     - fpnew
+    - idma
     - register_interface
     - riscv-dbg
     - tech_cells_generic
diff --git a/Bender.yml b/Bender.yml
index ec383709a..cf814c91c 100644
--- a/Bender.yml
+++ b/Bender.yml
@@ -29,7 +29,7 @@ dependencies:
   cva6:                   { path: hw/vendor/openhwgroup_cva6                                                }
   opentitan_peripherals:  { path: hw/vendor/pulp_platform_opentitan_peripherals                             }
   register_interface:     { git:  https://github.com/pulp-platform/register_interface.git, version: 0.4.2   }
-  snitch_cluster:         { git:  https://github.com/pulp-platform/snitch_cluster.git,     rev:     883a0ab3ed67f1a16ec920d5e985ae2a0eba5003 }
+  snitch_cluster:         { git:  https://github.com/pulp-platform/snitch_cluster.git,     rev:     occamy  }
   tech_cells_generic:     { git:  https://github.com/pulp-platform/tech_cells_generic.git, rev:     v0.2.11 }
   cluster_icache:         { git:  https://github.com/pulp-platform/cluster_icache.git,     version: 0.1.0   }
   idma:                   { git:  https://github.com/pulp-platform/iDMA,                   version: 0.6.0   }

From 63a481b339f489d105e1ee249063a624f8f4e208 Mon Sep 17 00:00:00 2001
From: Luca Colagrande <luca.colagrande3@gmail.com>
Date: Thu, 29 Aug 2024 19:41:25 +0200
Subject: [PATCH 04/11] target: Do not delete lock file on `bender-clean`

---
 target/sim/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/sim/Makefile b/target/sim/Makefile
index 3033ef0df..4cd021b53 100644
--- a/target/sim/Makefile
+++ b/target/sim/Makefile
@@ -589,7 +589,7 @@ clean-work:
 	rm -rf work
 
 clean-bender:
-	rm -rf $(BENDER_LOCK) $(ROOT)/.bender/ $(ROOT)/deps
+	rm -rf $(ROOT)/.bender/ $(ROOT)/deps
 
 clean-logs:
 	rm -rf $(LOGS_DIR)/

From 9b088601dbc863f10edea3f828a050206c526aba Mon Sep 17 00:00:00 2001
From: Luca Colagrande <luca.colagrande3@gmail.com>
Date: Fri, 30 Aug 2024 09:50:11 +0200
Subject: [PATCH 05/11] target: Remove Verilator Make targets

---
 target/sim/Makefile | 61 +--------------------------------------------
 1 file changed, 1 insertion(+), 60 deletions(-)

diff --git a/target/sim/Makefile b/target/sim/Makefile
index 4cd021b53..a93a4cffe 100644
--- a/target/sim/Makefile
+++ b/target/sim/Makefile
@@ -15,7 +15,7 @@ CFG_OVERRIDE ?=     # Override default config file
 .DEFAULT_GOAL := help
 .PHONY: all clean
 all: rtl sw addrmap
-clean: clean-bender clean-rtl clean-sw clean-addrmap clean-vlt clean-vcs clean-logs
+clean: clean-bender clean-rtl clean-sw clean-addrmap clean-vcs clean-logs
 
 ############
 # Makefrag #
@@ -85,7 +85,6 @@ CFG         = cfg/lru.hjson
 #####################
 
 VSIM_BENDER += -t cv64a6_imafdc_sv39 -t occamy
-VLT_BENDER  += -t cv64a6_imafdc_sv39 -t occamy
 
 VSIM_FLAGS += -t 1ps
 VSIM_FLAGS += -voptargs=+acc
@@ -114,13 +113,6 @@ VLOG_FLAGS += -suppress 13314
 VLOG_FLAGS += ${QUESTA_64BIT}
 VLOG_FLAGS += -timescale 1ns/1ps
 
-# Verilated and compiled Occamy system
-VLT_AR     = ${VLT_BUILDDIR}/Vtestharness__ALL.a
-
-VLT_FLAGS += -Wno-SYMRSVDWORD -Wno-BLKLOOPINIT
-VLT_FLAGS += --trace       # Enable VCD dumping
-VLT_FLAGS += --prof-cfuncs # Enable code profiling
-
 ###############
 # C testbench #
 ###############
@@ -139,19 +131,6 @@ TB_CC_FLAGS +=-I$(FESVR)/include
 TB_CC_FLAGS +=-I$(SNITCH_TEST_DIR)
 TB_CC_FLAGS +=-I$(TARGET_TEST_DIR)/uartdpi
 
-# Required C sources for the verilator TB that are linked against the verilated model
-VLT_COBJ  = $(VLT_BUILDDIR)/tb/bootrom.o
-VLT_COBJ += $(VLT_BUILDDIR)/tb/ipc.o
-VLT_COBJ += $(VLT_BUILDDIR)/tb/common_lib.o
-VLT_COBJ += $(VLT_BUILDDIR)/tb/verilator_lib.o
-VLT_COBJ += $(VLT_BUILDDIR)/tb/tb_bin.o
-VLT_COBJ += $(VLT_BUILDDIR)/test/uartdpi/uartdpi.o
-VLT_COBJ += $(VLT_BUILDDIR)/test/bootdata.o
-# Sources from verilator root
-VLT_COBJ += $(VLT_BUILDDIR)/vlt/verilated.o
-VLT_COBJ += $(VLT_BUILDDIR)/vlt/verilated_dpi.o
-VLT_COBJ += $(VLT_BUILDDIR)/vlt/verilated_vcd_c.o
-
 #################
 # Prerequisites #
 #################
@@ -508,42 +487,6 @@ $(CVA6_ANNOTATED_TRACE): $(CVA6_TXT_TRACE) $(ANNOTATE_PY)
 $(CVA6_DIFF_TRACE): $(CVA6_TXT_TRACE) $(ANNOTATE_PY)
 	$(PYTHON) $(ANNOTATE_PY) $(ANNOTATE_FLAGS) -o $@ $(CVA6_BINARY) $< -d
 
-#############
-# Verilator #
-#############
-
-${VLT_AR}: ${VLT_SOURCES} ${TB_SRCS}
-	$(call VERILATE,testharness)
-
-# Quick sanity check, not really meant for simulation.
-verilate: ${VLT_AR}
-
-# Build targets for verilator TB
-$(VLT_BUILDDIR)/tb/%.o: $(TB_DIR)/%.cc $(VLT_AR) ${VLT_BUILDDIR}/lib/libfesvr.a
-	mkdir -p $(dir $@)
-	$(CXX) $(CXXFLAGS) $(VLT_CFLAGS) -c $< -o $@
-$(VLT_BUILDDIR)/vlt/%.o: $(VLT_ROOT)/include/%.cpp
-	mkdir -p $(dir $@)
-	$(CXX) $(CXXFLAGS) $(VLT_CFLAGS) -c $< -o $@
-$(VLT_BUILDDIR)/test/%.o: $(TARGET_TEST_DIR)/%.cc ${VLT_BUILDDIR}/lib/libfesvr.a
-	mkdir -p $(dir $@)
-	$(CXX) $(CXXFLAGS) $(VLT_CFLAGS) -c $< -o $@
-
-$(VLT_BUILDDIR)/test/uartdpi/uartdpi.o: $(TARGET_TEST_DIR)/uartdpi/uartdpi.c
-	mkdir -p $(dir $@)
-	$(CC) $(CFLAGS) $(VLT_CFLAGS) -c $< -o $@
-
-# Link verilated archive wich $(VLT_COBJ)
-$(BIN_DIR)/$(TARGET).vlt: $(VLT_AR) $(VLT_COBJ) ${VLT_BUILDDIR}/lib/libfesvr.a
-	mkdir -p $(dir $@)
-	$(CXX) $(LDFLAGS) -std=c++14 -L ${VLT_BUILDDIR}/lib -o $@ $(VLT_COBJ) $(VLT_AR) -lfesvr -lpthread -lutil
-
-# Clean all build directories and temporary files for Verilator simulation
-.PHONY: clean-vlt
-clean-vlt: clean-work
-	rm -rf work-vlt
-	rm -f $(BIN_DIR)/$(TARGET).vlt
-
 ############
 # Questasim #
 ############
@@ -604,7 +547,6 @@ help:
 	@echo -e "${Blue}help           ${Black}Show an overview of all Makefile targets."
 	@echo -e ""
 	@echo -e "${Blue}bin/$(TARGET).vcs  ${Black}Build compilation script and compile all sources for VCS simulation. @IIS: vcs-2020.12 make bin/$(TARGET).vcs"
-	@echo -e "${Blue}bin/$(TARGET).vlt  ${Black}Build compilation script and compile all sources for Verilator simulation."
 	@echo -e "${Blue}bin/$(TARGET).vsim ${Black}Build compilation script and compile all sources for Questasim simulation. @IIS: QUESTA_HOME=/usr/pack/modelsim-10.7b-kgf/questasim/ CC=$(QUESTA_HOME)/gcc-5.3.0-linux_x86_64/bin/gcc CXX=$(QUESTA_HOME)/gcc-5.3.0-linux_x86_64/bin/g++ LD=$(QUESTA_HOME)/gcc-5.3.0-linux_x86_64/bin/ld make bin/$(TARGET).vsim"
 	@echo -e ""
 	@echo -e "${Blue}all            ${Black}Update all SW and HW related sources (by, e.g., re-generating the RegGen registers and their c-header files)."
@@ -618,7 +560,6 @@ help:
 	@echo -e "${Blue}clean-addrmap  ${Black}Delete all addrmap outputs."
 	@echo -e "${Blue}clean-logs     ${Black}Delete all traces in logs directory."
 	@echo -e "${Blue}clean-vcs      ${Black}Clean all build directories and temporary files for VCS simulation."
-	@echo -e "${Blue}clean-vlt      ${Black}Clean all build directories and temporary files for Verilator simulation."
 	@echo -e "${Blue}clean-vsim     ${Black}Clean all build directories and temporary files for Questasim simulation."
 	@echo -e ""
 	@echo -e "${Blue}sw             ${Black}Build all software."

From 4265ef9995c776a34fe29d9b67ecce25810a29f9 Mon Sep 17 00:00:00 2001
From: Luca Colagrande <luca.colagrande3@gmail.com>
Date: Fri, 30 Aug 2024 09:50:27 +0200
Subject: [PATCH 06/11] Bender.yml: Rename `snitch_cluster` target

Due to collision with iDMA `snitch_cluster` target, which groups
necessary iDMA sources for Snitch-cluster-based systems, we need a
different group for sources specific to the Snitch cluster simulation
target, which are not needed by Snitch-cluster-based systems. Thus,
we rename `snitch_cluster` to `snitch_cluster_sim`.
---
 Bender.yml          | 4 ++--
 target/sim/Makefile | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/Bender.yml b/Bender.yml
index cf814c91c..4e4b28336 100644
--- a/Bender.yml
+++ b/Bender.yml
@@ -61,14 +61,14 @@ sources:
       - hw/spm_interface/test/tb_spm_1p_adv.sv
 
   # soc_ctrl
-  - target: occamy
+  - target: occamy_sim
     files:
       - target/sim/src/soc_ctrl/occamy_soc_reg_pkg.sv
       - target/sim/src/soc_ctrl/occamy_soc_reg_top.sv
   - hw/occamy/soc_ctrl/occamy_soc_ctrl.sv
 
   # auto-generated soc
-  - target: occamy
+  - target: occamy_sim
     files:
       # quadrant_s1_ctrl
       - target/sim/src/quadrant_s1_ctrl/occamy_quadrant_s1_reg_pkg.sv
diff --git a/target/sim/Makefile b/target/sim/Makefile
index a93a4cffe..fd8489676 100644
--- a/target/sim/Makefile
+++ b/target/sim/Makefile
@@ -84,7 +84,7 @@ CFG         = cfg/lru.hjson
 # Simulator options #
 #####################
 
-VSIM_BENDER += -t cv64a6_imafdc_sv39 -t occamy
+VSIM_BENDER += -t cv64a6_imafdc_sv39 -t occamy_sim -t snitch_cluster
 
 VSIM_FLAGS += -t 1ps
 VSIM_FLAGS += -voptargs=+acc

From bcc82b7d6b75b61f4379b0ba41d562e75a75be48 Mon Sep 17 00:00:00 2001
From: Luca Colagrande <luca.colagrande3@gmail.com>
Date: Fri, 30 Aug 2024 11:51:01 +0200
Subject: [PATCH 07/11] hw: Fix iDMA integration

---
 hw/occamy/occamy_soc.sv.tpl | 35 +++++++++++++++++++++--------------
 1 file changed, 21 insertions(+), 14 deletions(-)

diff --git a/hw/occamy/occamy_soc.sv.tpl b/hw/occamy/occamy_soc.sv.tpl
index e745dc8db..3abd6d12c 100644
--- a/hw/occamy/occamy_soc.sv.tpl
+++ b/hw/occamy/occamy_soc.sv.tpl
@@ -412,7 +412,14 @@ module ${name}_soc
   .change_dw(context, 32, "out_sys_idma_cfg_dw") \
   %>\
 
-  <% in_sys_idma_mst  = soc_wide_xbar.__dict__["in_sys_idma_mst"] %>\
+  // iDMA master AXI bus
+  <% 
+  in_sys_idma_mst = soc_wide_xbar.__dict__["in_sys_idma_mst"].copy(name="sys_idma_mst")
+  in_sys_idma_mst.uw = 1
+  in_sys_idma_mst.type_prefix = in_sys_idma_mst.emit_struct()
+  in_sys_idma_mst.declare(context)
+  in_sys_idma_mst.change_uw(context, soc_wide_xbar.__dict__["in_sys_idma_mst"].uw, "", to=soc_wide_xbar.__dict__["in_sys_idma_mst"])
+  %>\
 
   // local regbus definition
   `REG_BUS_TYPEDEF_ALL(idma_cfg_reg_a${wide_in.aw}_d32, logic [${wide_in.aw-1}:0], logic [31:0], logic [7:0])
@@ -433,7 +440,7 @@ module ${name}_soc
 
   // AXI meta channels
   typedef struct packed {
-    ${out_sys_idma_cfg.ar_chan_type()} ar_chan;
+    ${in_sys_idma_mst.ar_chan_type()} ar_chan;
   } axi_read_meta_channel_t;
 
   typedef struct packed {
@@ -441,7 +448,7 @@ module ${name}_soc
   } read_meta_channel_t;
 
   typedef struct packed {
-    ${out_sys_idma_cfg.aw_chan_type()} aw_chan;
+    ${in_sys_idma_mst.aw_chan_type()} aw_chan;
   } axi_write_meta_channel_t;
 
   typedef struct packed {
@@ -467,8 +474,8 @@ module ${name}_soc
   idma_pkg::idma_busy_t idma_busy;
 
   // Regbus instance
-  idma_cfg_reg_a${wide_in.aw}_d32_req_t idma_cfg_reg_req;
-  idma_cfg_reg_a${wide_in.aw}_d32_rsp_t idma_cfg_reg_rsp;
+  idma_cfg_reg_a${out_sys_idma_cfg.aw}_d32_req_t idma_cfg_reg_req;
+  idma_cfg_reg_a${out_sys_idma_cfg.aw}_d32_rsp_t idma_cfg_reg_rsp;
 
   axi_to_reg #(
     .ADDR_WIDTH( ${out_sys_idma_cfg.aw}                 ),
@@ -477,8 +484,8 @@ module ${name}_soc
     .USER_WIDTH( ${out_sys_idma_cfg.uw}                 ),
     .axi_req_t ( ${out_sys_idma_cfg.req_type()}         ),
     .axi_rsp_t ( ${out_sys_idma_cfg.rsp_type()}         ),
-    .reg_req_t ( idma_cfg_reg_a${wide_in.aw}_d32_req_t  ),
-    .reg_rsp_t ( idma_cfg_reg_a${wide_in.aw}_d32_rsp_t  )
+    .reg_req_t ( idma_cfg_reg_a${out_sys_idma_cfg.aw}_d32_req_t  ),
+    .reg_rsp_t ( idma_cfg_reg_a${out_sys_idma_cfg.aw}_d32_rsp_t  )
   ) i_axi_to_reg_sys_idma_cfg (
     .clk_i,
     .rst_ni,
@@ -493,8 +500,8 @@ module ${name}_soc
     .NumRegs        ( 32'd1 ),
     .NumStreams     ( 32'd1 ),
     .IdCounterWidth ( 32'd32 ),
-    .reg_req_t      ( idma_cfg_reg_a${wide_in.aw}_d32_req_t ),
-    .reg_rsp_t      ( idma_cfg_reg_a${wide_in.aw}_d32_rsp_t ),
+    .reg_req_t      ( idma_cfg_reg_a${out_sys_idma_cfg.aw}_d32_req_t ),
+    .reg_rsp_t      ( idma_cfg_reg_a${out_sys_idma_cfg.aw}_d32_rsp_t ),
     .dma_req_t      ( idma_req_t )
   ) i_idma_reg64_1d (
     .clk_i,
@@ -530,13 +537,13 @@ module ${name}_soc
   );
 
   idma_backend_rw_axi #(
-    .DataWidth            ( ${wide_in.dw-1} ),
-    .AddrWidth            ( ${wide_in.aw-1} ),
-    .UserWidth            ( ${wide_in.uw} ),
-    .AxiIdWidth           ( ${wide_in.iw-1} ),
+    .DataWidth            ( ${in_sys_idma_mst.dw} ),
+    .AddrWidth            ( ${in_sys_idma_mst.aw} ),
+    .UserWidth            ( ${in_sys_idma_mst.uw} ),
+    .AxiIdWidth           ( ${in_sys_idma_mst.iw} ),
     .NumAxInFlight        ( 32'd64 ),
     .BufferDepth          ( 32'd3 ),
-    .TFLenWidth           ( ${wide_in.aw-1} ),
+    .TFLenWidth           ( ${in_sys_idma_mst.aw} ),
     .MemSysDepth          ( 32'd16 ),
     .CombinedShifter      ( 1'b1 ),
     .RAWCouplingAvail     ( 1'b1 ),

From 8ce5c9286121341c66784ac4accff121d8c634ae Mon Sep 17 00:00:00 2001
From: Luca Colagrande <luca.colagrande3@gmail.com>
Date: Sat, 31 Aug 2024 12:41:21 +0200
Subject: [PATCH 08/11] target: Update `sys_dma` C library functions based on
 iDMA

---
 target/sim/Makefile                           |   5 +
 .../sw/shared/platform/generated/.gitignore   |   3 +-
 .../sw/shared/platform/generated/sys_dma.c    |  13 +-
 .../sw/shared/platform/generated/sys_dma.h    | 114 ++++--------------
 4 files changed, 35 insertions(+), 100 deletions(-)

diff --git a/target/sim/Makefile b/target/sim/Makefile
index fd8489676..67d476718 100644
--- a/target/sim/Makefile
+++ b/target/sim/Makefile
@@ -421,6 +421,8 @@ $(ADDRMAP_PDF): $(ADDRMAP_TEX) | $(TARGET_ADDRMAP_DIR)
 # Software #
 ############
 
+IDMAROOT = $(shell $(BENDER) path idma)
+
 PLATFORM_HEADERS  = $(PLATFORM_HEADERS_DIR)/occamy_cfg.h
 PLATFORM_HEADERS += $(PLATFORM_HEADERS_DIR)/occamy_base_addr.h
 PLATFORM_HEADERS += $(PLATFORM_HEADERS_DIR)/clint.h
@@ -428,6 +430,7 @@ PLATFORM_HEADERS += $(PLATFORM_HEADERS_DIR)/occamy_soc_ctrl.h
 PLATFORM_HEADERS += $(PLATFORM_HEADERS_DIR)/snitch_cluster_peripheral.h
 PLATFORM_HEADERS += $(PLATFORM_HEADERS_DIR)/snitch_quad_peripheral.h
 PLATFORM_HEADERS += $(PLATFORM_HEADERS_DIR)/snitch_hbm_xbar_peripheral.h
+PLATFORM_HEADERS += $(PLATFORM_HEADERS_DIR)/idma.h
 
 .PHONY: sw clean-headers clean-sw
 
@@ -451,6 +454,8 @@ $(PLATFORM_HEADERS_DIR)/snitch_quad_peripheral.h: $(TARGET_QUADCTRL_DIR)/occamy_
 	$(call reggen_generate_header,$@,$<)
 $(PLATFORM_HEADERS_DIR)/snitch_hbm_xbar_peripheral.h: $(TARGET_HBMCTRL_DIR)/occamy_hbm_xbar_reg.hjson
 	$(call reggen_generate_header,$@,$<)
+$(PLATFORM_HEADERS_DIR)/idma.h: $(IDMAROOT)/target/rtl/idma_reg64_1d.hjson
+	$(call reggen_generate_header,$@,$<)
 
 # OCCAMYGEN headers
 $(PLATFORM_HEADERS_DIR)/occamy_cfg.h: $(PLATFORM_HEADERS_DIR)/occamy_cfg.h.tpl $(CFG)
diff --git a/target/sim/sw/shared/platform/generated/.gitignore b/target/sim/sw/shared/platform/generated/.gitignore
index e93ad9713..42eaad621 100644
--- a/target/sim/sw/shared/platform/generated/.gitignore
+++ b/target/sim/sw/shared/platform/generated/.gitignore
@@ -7,4 +7,5 @@ occamy_soc_ctrl.h
 occamy_soc_peripheral.h
 snitch_cluster_peripheral.h
 snitch_hbm_xbar_peripheral.h
-snitch_quad_peripheral.h
\ No newline at end of file
+snitch_quad_peripheral.h
+idma.h
\ No newline at end of file
diff --git a/target/sim/sw/shared/platform/generated/sys_dma.c b/target/sim/sw/shared/platform/generated/sys_dma.c
index eb1bf1b4a..4912de84b 100644
--- a/target/sim/sw/shared/platform/generated/sys_dma.c
+++ b/target/sim/sw/shared/platform/generated/sys_dma.c
@@ -2,13 +2,10 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-extern volatile uint64_t *sys_dma_src_ptr(void);
-extern volatile uint64_t *sys_dma_dst_ptr(void);
-extern volatile uint64_t *sys_dma_num_bytes_ptr(void);
-extern volatile uint64_t *sys_dma_conf_ptr(void);
-extern volatile uint64_t *sys_dma_status_ptr(void);
-extern volatile uint64_t *sys_dma_nextid_ptr(void);
-extern volatile uint64_t *sys_dma_done_ptr(void);
+extern void sys_dma_write_reg64(uint64_t offset, uint64_t value);
+extern uint64_t sys_dma_read_reg64(uint64_t offset);
+extern void sys_dma_write_reg32(uint32_t offset, uint32_t value);
+extern uint32_t sys_dma_read_reg32(uint32_t offset);
 
-extern uint64_t sys_dma_memcpy(uint64_t dst, uint64_t src, uint64_t size);
+extern uint32_t sys_dma_memcpy(uint64_t dst, uint64_t src, uint64_t size);
 extern void sys_dma_blk_memcpy(uint64_t dst, uint64_t src, uint64_t size);
diff --git a/target/sim/sw/shared/platform/generated/sys_dma.h b/target/sim/sw/shared/platform/generated/sys_dma.h
index 3a513decd..cdf0eeff6 100644
--- a/target/sim/sw/shared/platform/generated/sys_dma.h
+++ b/target/sim/sw/shared/platform/generated/sys_dma.h
@@ -2,108 +2,40 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-// Generated register defines for idma_reg64_frontend
-
-#ifndef _IDMA_REG64_FRONTEND_REG_DEFS_
-#define _IDMA_REG64_FRONTEND_REG_DEFS_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-// Register width
-#define IDMA_REG64_FRONTEND_PARAM_REG_WIDTH 64
-
-// Source Address
-#define IDMA_REG64_FRONTEND_SRC_ADDR_REG_OFFSET 0x0
-
-// Destination Address
-#define IDMA_REG64_FRONTEND_DST_ADDR_REG_OFFSET 0x8
-
-// Number of bytes
-#define IDMA_REG64_FRONTEND_NUM_BYTES_REG_OFFSET 0x10
-
-// Configuration Register for DMA settings
-#define IDMA_REG64_FRONTEND_CONF_REG_OFFSET 0x18
-#define IDMA_REG64_FRONTEND_CONF_DECOUPLE_BIT 0
-#define IDMA_REG64_FRONTEND_CONF_DEBURST_BIT 1
-#define IDMA_REG64_FRONTEND_CONF_SERIALIZE_BIT 2
-
-// DMA Status
-#define IDMA_REG64_FRONTEND_STATUS_REG_OFFSET 0x20
-#define IDMA_REG64_FRONTEND_STATUS_BUSY_BIT 0
-
-// Next ID, launches transfer, returns 0 if transfer not set up properly.
-#define IDMA_REG64_FRONTEND_NEXT_ID_REG_OFFSET 0x28
-
-// Get ID of finished transactions.
-#define IDMA_REG64_FRONTEND_DONE_REG_OFFSET 0x30
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif
-#endif  // _IDMA_REG64_FRONTEND_REG_DEFS_
-// End generated register defines for idma_reg64_frontend
-
 #include <stdint.h>
 
+#include "idma.h"
 #include "occamy_memory_map.h"
 
-#define IDMA_SRC_ADDR \
-    (SYS_IDMA_CFG_BASE_ADDR + IDMA_REG64_FRONTEND_SRC_ADDR_REG_OFFSET)
-#define IDMA_DST_ADDR \
-    (SYS_IDMA_CFG_BASE_ADDR + IDMA_REG64_FRONTEND_DST_ADDR_REG_OFFSET)
-#define IDMA_NUMBYTES_ADDR \
-    (SYS_IDMA_CFG_BASE_ADDR + IDMA_REG64_FRONTEND_NUM_BYTES_REG_OFFSET)
-#define IDMA_CONF_ADDR \
-    (SYS_IDMA_CFG_BASE_ADDR + IDMA_REG64_FRONTEND_CONF_REG_OFFSET)
-#define IDMA_STATUS_ADDR \
-    (SYS_IDMA_CFG_BASE_ADDR + IDMA_REG64_FRONTEND_STATUS_REG_OFFSET)
-#define IDMA_NEXTID_ADDR \
-    (SYS_IDMA_CFG_BASE_ADDR + IDMA_REG64_FRONTEND_NEXT_ID_REG_OFFSET)
-#define IDMA_DONE_ADDR \
-    (SYS_IDMA_CFG_BASE_ADDR + IDMA_REG64_FRONTEND_DONE_REG_OFFSET)
-
-#define IDMA_CONF_DECOUPLE 0
-#define IDMA_CONF_DEBURST 0
-#define IDMA_CONF_SERIALIZE 0
-
-inline volatile uint64_t *sys_dma_src_ptr(void) {
-    return (volatile uint64_t *)IDMA_SRC_ADDR;
-}
-inline volatile uint64_t *sys_dma_dst_ptr(void) {
-    return (volatile uint64_t *)IDMA_DST_ADDR;
-}
-inline volatile uint64_t *sys_dma_num_bytes_ptr(void) {
-    return (volatile uint64_t *)IDMA_NUMBYTES_ADDR;
+inline void sys_dma_write_reg64(uint64_t offset, uint64_t value) {
+    *(volatile uint64_t *)(SYS_IDMA_CFG_BASE_ADDR + offset) = value;
 }
-inline volatile uint64_t *sys_dma_conf_ptr(void) {
-    return (volatile uint64_t *)IDMA_CONF_ADDR;
-}
-inline volatile uint64_t *sys_dma_status_ptr(void) {
-    return (volatile uint64_t *)IDMA_STATUS_ADDR;
+
+inline uint64_t sys_dma_read_reg64(uint64_t offset) {
+    return *(volatile uint64_t *)(SYS_IDMA_CFG_BASE_ADDR + offset);
 }
-inline volatile uint64_t *sys_dma_nextid_ptr(void) {
-    return (volatile uint64_t *)IDMA_NEXTID_ADDR;
+
+inline void sys_dma_write_reg32(uint32_t offset, uint32_t value) {
+    *(volatile uint32_t *)(uintptr_t)(SYS_IDMA_CFG_BASE_ADDR + offset) = value;
 }
-inline volatile uint64_t *sys_dma_done_ptr(void) {
-    return (volatile uint64_t *)IDMA_DONE_ADDR;
+
+inline uint32_t sys_dma_read_reg32(uint32_t offset) {
+    return *(volatile uint32_t *)(uintptr_t)(SYS_IDMA_CFG_BASE_ADDR + offset);
 }
 
-inline uint64_t sys_dma_memcpy(uint64_t dst, uint64_t src, uint64_t size) {
-    *(sys_dma_src_ptr()) = (uint64_t)src;
-    *(sys_dma_dst_ptr()) = (uint64_t)dst;
-    *(sys_dma_num_bytes_ptr()) = size;
-    *(sys_dma_conf_ptr()) =
-        (IDMA_CONF_DECOUPLE << IDMA_REG64_FRONTEND_CONF_DECOUPLE_BIT) |
-        (IDMA_CONF_DEBURST << IDMA_REG64_FRONTEND_CONF_DEBURST_BIT) |
-        (IDMA_CONF_SERIALIZE << IDMA_REG64_FRONTEND_CONF_SERIALIZE_BIT);
-    return *(sys_dma_nextid_ptr());
+inline uint32_t sys_dma_memcpy(uint64_t dst, uint64_t src, uint64_t size) {
+    sys_dma_write_reg32(IDMA_REG64_1D_SRC_ADDR_LOW_REG_OFFSET, src);
+    sys_dma_write_reg32(IDMA_REG64_1D_SRC_ADDR_HIGH_REG_OFFSET, src >> 32);
+    sys_dma_write_reg32(IDMA_REG64_1D_DST_ADDR_LOW_REG_OFFSET, dst);
+    sys_dma_write_reg32(IDMA_REG64_1D_DST_ADDR_HIGH_REG_OFFSET, dst >> 32);
+    sys_dma_write_reg32(IDMA_REG64_1D_LENGTH_LOW_REG_OFFSET, size);
+    sys_dma_write_reg32(IDMA_REG64_1D_LENGTH_HIGH_REG_OFFSET, size >> 32);
+    return sys_dma_read_reg32(IDMA_REG64_1D_NEXT_ID_0_REG_OFFSET);
 }
 
 inline void sys_dma_blk_memcpy(uint64_t dst, uint64_t src, uint64_t size) {
-    volatile uint64_t tf_id = sys_dma_memcpy(dst, src, size);
+    volatile uint32_t tf_id = sys_dma_memcpy(dst, src, size);
 
-    while (*(sys_dma_done_ptr()) != tf_id) {
-        asm volatile("nop");
-    }
+    while (sys_dma_read_reg32(IDMA_REG64_1D_DONE_ID_0_REG_OFFSET) != tf_id)
+        ;
 }

From 6157ecffdf0c3ab8c742874d10ef5c355f8563d5 Mon Sep 17 00:00:00 2001
From: Luca Colagrande <luca.colagrande3@gmail.com>
Date: Sat, 31 Aug 2024 12:44:17 +0200
Subject: [PATCH 09/11] sw: Add system DMA test

---
 target/sim/sw/host/Makefile                   |  1 +
 target/sim/sw/host/apps/test_sys_dma/Makefile | 10 ++++
 .../host/apps/test_sys_dma/src/test_sys_dma.c | 48 +++++++++++++++++++
 target/sim/sw/run-full-occamy.yaml            |  1 +
 target/sim/sw/run-single-cluster.yaml         |  1 +
 5 files changed, 61 insertions(+)
 create mode 100644 target/sim/sw/host/apps/test_sys_dma/Makefile
 create mode 100644 target/sim/sw/host/apps/test_sys_dma/src/test_sys_dma.c

diff --git a/target/sim/sw/host/Makefile b/target/sim/sw/host/Makefile
index 217287043..6db859961 100644
--- a/target/sim/sw/host/Makefile
+++ b/target/sim/sw/host/Makefile
@@ -6,6 +6,7 @@
 
 # Add user applications to APPS variable
 APPS  = hello_world
+APPS += test_sys_dma
 APPS += offload
 
 TARGET ?= all
diff --git a/target/sim/sw/host/apps/test_sys_dma/Makefile b/target/sim/sw/host/apps/test_sys_dma/Makefile
new file mode 100644
index 000000000..206c287da
--- /dev/null
+++ b/target/sim/sw/host/apps/test_sys_dma/Makefile
@@ -0,0 +1,10 @@
+# Copyright 2024 ETH Zurich and University of Bologna.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Luca Colagrande <colluca@iis.ee.ethz.ch>
+
+APP  = test_sys_dma
+SRCS = src/test_sys_dma.c
+
+include ../common.mk
diff --git a/target/sim/sw/host/apps/test_sys_dma/src/test_sys_dma.c b/target/sim/sw/host/apps/test_sys_dma/src/test_sys_dma.c
new file mode 100644
index 000000000..23c6d2b80
--- /dev/null
+++ b/target/sim/sw/host/apps/test_sys_dma/src/test_sys_dma.c
@@ -0,0 +1,48 @@
+// Copyright 2024 ETH Zurich and University of Bologna.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "host.c"
+
+#define LENGTH 32
+
+// Allocate buffers in main memory which we will use to copy data around
+// with the DMA.
+volatile uint32_t dst_buffer[LENGTH];
+volatile uint32_t src_buffer[LENGTH];
+
+int main() {
+    uint32_t errors = LENGTH * 3;
+
+    // Populate buffers.
+    for (uint32_t i = 0; i < LENGTH; i++) {
+        dst_buffer[i] = 0x55555555;
+        src_buffer[i] = i + 1;
+    }
+
+    // Flush values out of cache.
+    fence();
+
+    // Check that the buffers are properly initialized.
+    for (uint32_t i = 0; i < LENGTH; i++) {
+        errors -= dst_buffer[i] == 0x55555555;
+        errors -= src_buffer[i] == i + 1;
+    }
+
+    // Flush values out of cache.
+    fence();
+
+    // Copy data to main memory.
+    sys_dma_blk_memcpy((uint64_t)dst_buffer, (uint64_t)src_buffer,
+                       sizeof(src_buffer));
+
+    // Flush values out of cache.
+    fence();
+
+    // Check that the main memory buffer contains the correct data.
+    for (uint32_t i = 0; i < LENGTH; i++) {
+        errors -= dst_buffer[i] == (i + 1);
+    }
+
+    return errors;
+}
diff --git a/target/sim/sw/run-full-occamy.yaml b/target/sim/sw/run-full-occamy.yaml
index abc662855..fca64197b 100644
--- a/target/sim/sw/run-full-occamy.yaml
+++ b/target/sim/sw/run-full-occamy.yaml
@@ -11,3 +11,4 @@ runs:
     cmd: [../../../deps/snitch_cluster/sw/blas/gemm/scripts/verify.py,
           --symbols-bin, ./device/apps/blas/gemm/build/gemm.elf,
           "${sim_bin}", "${elf}"]
+  - elf: host/apps/test_sys_dma/build/test_sys_dma.elf
diff --git a/target/sim/sw/run-single-cluster.yaml b/target/sim/sw/run-single-cluster.yaml
index ed432924e..dfffa0344 100644
--- a/target/sim/sw/run-single-cluster.yaml
+++ b/target/sim/sw/run-single-cluster.yaml
@@ -13,3 +13,4 @@ runs:
           "${sim_bin}", "${elf}"]
   - elf: host/apps/hello_world/build/hello_world.elf
     cmd: [./host/apps/hello_world/verify.py, "${sim_bin}", "${elf}"]
+  - elf: host/apps/test_sys_dma/build/test_sys_dma.elf

From a1792cc30e229651202b2e4b447b0ac509a3d577 Mon Sep 17 00:00:00 2001
From: Luca Colagrande <luca.colagrande3@gmail.com>
Date: Sat, 31 Aug 2024 12:45:16 +0200
Subject: [PATCH 10/11] target: Update trace generation

* target: Replace `LOGS_DIR` with `SIM_DIR`
---
 target/sim/Makefile | 22 ++++++----------------
 1 file changed, 6 insertions(+), 16 deletions(-)

diff --git a/target/sim/Makefile b/target/sim/Makefile
index 67d476718..ee34c6e89 100644
--- a/target/sim/Makefile
+++ b/target/sim/Makefile
@@ -33,6 +33,7 @@ TARGET = occamy_top
 CVA6_TXT_TRACE       = $(LOGS_DIR)/trace_hart_00000.txt
 CVA6_PERF_DUMP       = $(LOGS_DIR)/hart_00000_perf.json
 CVA6_ANNOTATED_TRACE = $(LOGS_DIR)/trace_hart_00000.s
+CVA6_BINARY         ?= $(shell cat $(SIM_DIR)/.rtlbinary)
 TXT_TRACES          += $(CVA6_TXT_TRACE)
 PERF_DUMPS          += $(CVA6_PERF_DUMP)
 ANNOTATED_TRACES    += $(CVA6_ANNOTATED_TRACE)
@@ -469,28 +470,17 @@ $(PLATFORM_HEADERS_DIR)/occamy_base_addr.h: $(CFG)
 # Traces #
 ##########
 
-CVA6_BINARY ?= $(shell cat $(LOGS_DIR)/.rtlbinary)
-
-CVA6_TXT_TRACE       = $(LOGS_DIR)/trace_hart_00000.txt
-CVA6_PERF_TRACE      = $(LOGS_DIR)/hart_00000_perf.json
-CVA6_ANNOTATED_TRACE = $(LOGS_DIR)/trace_hart_00000.s
-CVA6_DIFF_TRACE      = $(LOGS_DIR)/trace_hart_00000.diff
-
-TXT_TRACES       += $(CVA6_TXT_TRACE)
-PERF_TRACES      += $(CVA6_PERF_TRACE)
-ANNOTATED_TRACES += $(CVA6_ANNOTATED_TRACE)
-DIFF_TRACES      += $(CVA6_DIFF_TRACE)
-
-traces: $(CVA6_TXT_TRACE) $(CVA6_PERF_TRACE)
+traces: $(CVA6_TXT_TRACE) $(CVA6_PERF_DUMP)
 annotate: $(CVA6_ANNOTATED_TRACE)
 
+$(CVA6_TXT_TRACE): $(SIM_DIR)/trace_hart_0.log
+	cp $< $@
+
 # CVA6 traces require different handling
-$(CVA6_PERF_TRACE): $(CVA6_TXT_TRACE) $(EVENTS_PY)
+$(CVA6_PERF_DUMP): $(CVA6_TXT_TRACE) $(EVENTS_PY)
 	$(PYTHON) $(EVENTS_PY) -f cva6 $< -o $@
 $(CVA6_ANNOTATED_TRACE): $(CVA6_TXT_TRACE) $(ANNOTATE_PY)
 	$(PYTHON) $(ANNOTATE_PY) $(ANNOTATE_FLAGS) -o $@ $(CVA6_BINARY) $<
-$(CVA6_DIFF_TRACE): $(CVA6_TXT_TRACE) $(ANNOTATE_PY)
-	$(PYTHON) $(ANNOTATE_PY) $(ANNOTATE_FLAGS) -o $@ $(CVA6_BINARY) $< -d
 
 ############
 # Questasim #

From 684603b14612f40199cb68e7f0ad5c5ae322dad7 Mon Sep 17 00:00:00 2001
From: Luca Colagrande <luca.colagrande3@gmail.com>
Date: Mon, 2 Sep 2024 09:09:54 +0200
Subject: [PATCH 11/11] target: Fix bootrom Make targets

---
 target/sim/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/sim/Makefile b/target/sim/Makefile
index ee34c6e89..80b1f3c03 100644
--- a/target/sim/Makefile
+++ b/target/sim/Makefile
@@ -181,11 +181,11 @@ clean-bootrom:
 	rm -rf $(BOOTROM_TARGETS)
 
 $(TARGET_TEST_DIR)/bootrom.elf: $(TARGET_TEST_DIR)/bootrom.S $(TARGET_TEST_DIR)/bootrom.ld
-	riscv64-unknown-elf-gcc -mabi=lp64d -march=rv64imafd -static -nostartfiles -T$(TARGET_TEST_DIR)/bootrom.ld $< -o $(TARGET_TEST_DIR)/bootrom.elf
+	$(RISCV_GCC_BINROOT)/riscv64-unknown-elf-gcc -mabi=lp64d -march=rv64imafd -static -nostartfiles -T$(TARGET_TEST_DIR)/bootrom.ld $< -o $(TARGET_TEST_DIR)/bootrom.elf
 $(TARGET_TEST_DIR)/bootrom.dump: $(TARGET_TEST_DIR)/bootrom.elf
-	riscv64-unknown-elf-objdump -D $< > $@
+	$(RISCV_GCC_BINROOT)/riscv64-unknown-elf-objdump -D $< > $@
 $(TARGET_TEST_DIR)/bootrom.bin: $(TARGET_TEST_DIR)/bootrom.elf
-	riscv64-unknown-elf-objcopy -O binary $< $@
+	$(RISCV_GCC_BINROOT)/riscv64-unknown-elf-objcopy -O binary $< $@
 
 ###############
 # RTL sources #