forked from flashrom/flashrom
-
Notifications
You must be signed in to change notification settings - Fork 0
/
flashrom.8.tmpl
1528 lines (1526 loc) · 51.5 KB
/
flashrom.8.tmpl
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
.\" Load the www device when using groff; provide a fallback for groff's MTO macro that formats email addresses.
.ie \n[.g] \
. mso www.tmac
.el \{
. de MTO
\\$2 \(la\\$1 \(ra\\$3 \
. .
.\}
.\" Create wrappers for .MTO and .URL that print only text on systems w/o groff or if not outputting to a HTML
.\" device. To that end we need to distinguish HTML output on groff from other configurations first.
.nr groffhtml 0
.if \n[.g] \
. if "\*[.T]"html" \
. nr groffhtml 1
.\" For code reuse it would be nice to have a single wrapper that gets its target macro as parameter.
.\" However, this did not work out with NetBSD's and OpenBSD's groff...
.de URLB
. ie (\n[groffhtml]==1) \{\
. URL \\$@
. \}
. el \{\
. ie "\\$2"" \{\
. BR "\\$1" "\\$3"
. \}
. el \{\
. RB "\\$2 \(la" "\\$1" "\(ra\\$3"
. \}
. \}
..
.de MTOB
. ie (\n[groffhtml]==1) \{\
. MTO \\$@
. \}
. el \{\
. ie "\\$2"" \{\
. BR "\\$1" "\\$3"
. \}
. el \{\
. RB "\\$2 \(la" "\\$1" "\(ra\\$3"
. \}
. \}
..
.TH FLASHROM 8 "@MAN_DATE@" "@VERSION@" "@MAN_DATE@"
.SH NAME
flashrom \- detect, read, write, verify and erase flash chips
.SH SYNOPSIS
.B flashrom \fR[\fB\-h\fR|\fB\-R\fR|\fB\-L\fR|\fB\-z\fR|
\fB\-p\fR <programmername>[:<parameters>] [\fB\-c\fR <chipname>]
(\fB\-\-flash\-name\fR|\fB\-\-flash\-size\fR|
[\fB\-E\fR|\fB\-r\fR <file>|\fB\-w\fR <file>|\fB\-v\fR <file>]
[(\fB\-l\fR <file>|\fB\-\-ifd|\fB \-\-fmap\fR|\fB\-\-fmap-file\fR <file>) [\fB\-i\fR <image>]]
[\fB\-n\fR] [\fB\-N\fR] [\fB\-f\fR])]
[\fB\-V\fR[\fBV\fR[\fBV\fR]]] [\fB-o\fR <logfile>]
.SH DESCRIPTION
.B flashrom
is a utility for detecting, reading, writing, verifying and erasing flash
chips. It's often used to flash BIOS/EFI/coreboot/firmware images in-system
using a supported mainboard. However, it also supports various external
PCI/USB/parallel-port/serial-port based devices which can program flash chips,
including some network cards (NICs), SATA/IDE controller cards, graphics cards,
the Bus Pirate device, various FTDI FT2232/FT4232H/FT232H based USB devices, and more.
.PP
It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, TSOP40,
TSOP48, and BGA chips, which use various protocols such as LPC, FWH,
parallel flash, or SPI.
.SH OPTIONS
.B IMPORTANT:
Please note that the command line interface for flashrom will change before
flashrom 1.0. Do not use flashrom in scripts or other automated tools without
checking that your flashrom version won't interpret options in a different way.
.PP
You can specify one of
.BR \-h ", " \-R ", " \-L ", " \-z ", " \-E ", " \-r ", " \-w ", " \-v
or no operation.
If no operation is specified, flashrom will only probe for flash chips. It is
recommended that if you try flashrom the first time on a system, you run it
in probe-only mode and check the output. Also you are advised to make a
backup of your current ROM contents with
.B \-r
before you try to write a new image. All operations involving any chip access (probe/read/write/...) require the
.B -p/--programmer
option to be used (please see below).
.TP
.B "\-r, \-\-read <file>"
Read flash ROM contents and save them into the given
.BR <file> .
If the file already exists, it will be overwritten.
.TP
.B "\-w, \-\-write <file>"
Write
.B <file>
into flash ROM. This will first automatically
.B erase
the chip, then write to it.
.sp
In the process the chip is also read several times. First an in-memory backup
is made for disaster recovery and to be able to skip regions that are
already equal to the image file. This copy is updated along with the write
operation. In case of erase errors it is even re-read completely. After
writing has finished and if verification is enabled, the whole flash chip is
read out and compared with the input image.
.TP
.B "\-n, \-\-noverify"
Skip the automatic verification of flash ROM contents after writing. Using this
option is
.B not
recommended, you should only use it if you know what you are doing and if you
feel that the time for verification takes too long.
.sp
Typical usage is:
.B "flashrom \-p prog \-n \-w <file>"
.sp
This option is only useful in combination with
.BR \-\-write .
.TP
.B "\-N, \-\-noverify-all"
Skip not included regions during automatic verification after writing (cf.
.BR "\-l " "and " "\-i" ).
You should only use this option if you are sure that communication with
the flash chip is reliable (e.g. when using the
.BR internal
programmer). Even if flashrom is instructed not to touch parts of the
flash chip, their contents could be damaged (e.g. due to misunderstood
erase commands).
.sp
This option is required to flash an Intel system with locked ME flash
region using the
.BR internal
programmer. It may be enabled by default in this case in the future.
.TP
.B "\-v, \-\-verify <file>"
Verify the flash ROM contents against the given
.BR <file> .
.TP
.B "\-E, \-\-erase"
Erase the flash ROM chip.
.TP
.B "\-V, \-\-verbose"
More verbose output. This option can be supplied multiple times
(max. 3 times, i.e.
.BR \-VVV )
for even more debug output.
.TP
.B "\-c, \-\-chip" <chipname>
Probe only for the specified flash ROM chip. This option takes the chip name as
printed by
.B "flashrom \-L"
without the vendor name as parameter. Please note that the chip name is
case sensitive.
.TP
.B "\-f, \-\-force"
Force one or more of the following actions:
.sp
* Force chip read and pretend the chip is there.
.sp
* Force chip access even if the chip is bigger than the maximum supported \
size for the flash bus.
.sp
* Force erase even if erase is known bad.
.sp
* Force write even if write is known bad.
.TP
.B "\-l, \-\-layout <file>"
Read ROM layout from
.BR <file> .
.sp
flashrom supports ROM layouts. This allows you to flash certain parts of
the flash chip only. A ROM layout file contains multiple lines with the
following syntax:
.sp
.B " startaddr:endaddr imagename"
.sp
.BR "startaddr " "and " "endaddr "
are hexadecimal addresses within the ROM file and do not refer to any
physical address. Please note that using a 0x prefix for those hexadecimal
numbers is not necessary, but you can't specify decimal/octal numbers.
.BR "imagename " "is an arbitrary name for the region/image from"
.BR " startaddr " "to " "endaddr " "(both addresses included)."
.sp
Example:
.sp
00000000:00008fff gfxrom
00009000:0003ffff normal
00040000:0007ffff fallback
.sp
If you only want to update the image named
.BR "normal " "in a ROM based on the layout above, run"
.sp
.B " flashrom \-p prog \-\-layout rom.layout \-\-image normal \-w some.rom"
.sp
To update only the images named
.BR "normal " "and " "fallback" ", run:"
.sp
.B " flashrom \-p prog \-l rom.layout \-i normal -i fallback \-w some.rom"
.sp
Overlapping sections are not supported.
.TP
.B "\-\-fmap"
Read layout from fmap in flash chip.
.sp
flashrom supports the fmap binary format which is commonly used by coreboot
for partitioning a flash chip. The on-chip fmap will be read and used to generate
the layout.
.sp
If you only want to update the
.BR "COREBOOT"
region defined in the fmap, run
.sp
.B " flashrom -p prog \-\-fmap \-\-image COREBOOT \-w some.rom"
.TP
.B "\-\-fmap-file <file>"
Read layout from a
.BR <file>
containing binary fmap (e.g. coreboot roms).
.sp
flashrom supports the fmap binary format which is commonly used by coreboot
for partitioning a flash chip. The fmap in the specified file will be read and
used to generate the layout.
.sp
If you only want to update the
.BR "COREBOOT"
region defined in the binary fmap file, run
.sp
.B " flashrom \-p prog \-\-fmap-file some.rom \-\-image COREBOOT \-w some.rom"
.TP
.B "\-\-ifd"
Read ROM layout from Intel Firmware Descriptor.
.sp
flashrom supports ROM layouts given by an Intel Firmware Descriptor
(IFD). The on-chip descriptor will be read and used to generate the
layout. If you need to change the layout, you have to update the IFD
only first.
.sp
The following ROM images may be present in an IFD:
.sp
fd the IFD itself
bios the host firmware aka. BIOS
me Intel Management Engine firmware
gbe gigabit ethernet firmware
pd platform specific data
.TP
.B "\-i, \-\-image <imagename>"
Only flash region/image
.B <imagename>
from flash layout.
.TP
.B "\-\-flash\-name"
Prints out the detected flash chips name.
.TP
.B "\-\-flash\-size"
Prints out the detected flash chips size.
.TP
.B "\-L, \-\-list\-supported"
List the flash chips, chipsets, mainboards, and external programmers
(including PCI, USB, parallel port, and serial port based devices)
supported by flashrom.
.sp
There are many unlisted boards which will work out of the box, without
special support in flashrom. Please let us know if you can verify that
other boards work or do not work out of the box.
.sp
.B IMPORTANT:
For verification you have
to test an ERASE and/or WRITE operation, so make sure you only do that
if you have proper means to recover from failure!
.TP
.B "\-z, \-\-list\-supported-wiki"
Same as
.BR \-\-list\-supported ,
but outputs the supported hardware in MediaWiki syntax, so that it can be
easily pasted into the
.URLB https://flashrom.org/Supported_hardware "supported hardware wiki page" .
Please note that MediaWiki output is not compiled in by default.
.TP
.B "\-p, \-\-programmer <name>[:parameter[,parameter[,parameter]]]"
Specify the programmer device. This is mandatory for all operations
involving any chip access (probe/read/write/...). Currently supported are:
.sp
.BR "* internal" " (for in-system flashing in the mainboard)"
.sp
.BR "* dummy" " (virtual programmer for testing flashrom)"
.sp
.BR "* nic3com" " (for flash ROMs on 3COM network cards)"
.sp
.BR "* nicrealtek" " (for flash ROMs on Realtek and SMC 1211 network cards)"
.sp
.BR "* nicnatsemi" " (for flash ROMs on National Semiconductor DP838* network \
cards)"
.sp
.BR "* nicintel" " (for parallel flash ROMs on Intel 10/100Mbit network cards)
.sp
.BR "* gfxnvidia" " (for flash ROMs on NVIDIA graphics cards)"
.sp
.BR "* drkaiser" " (for flash ROMs on Dr. Kaiser PC-Waechter PCI cards)"
.sp
.BR "* satasii" " (for flash ROMs on Silicon Image SATA/IDE controllers)"
.sp
.BR "* satamv" " (for flash ROMs on Marvell SATA controllers)"
.sp
.BR "* atahpt" " (for flash ROMs on Highpoint ATA/RAID controllers)"
.sp
.BR "* atavia" " (for flash ROMs on VIA VT6421A SATA controllers)"
.sp
.BR "* atapromise" " (for flash ROMs on Promise PDC2026x ATA/RAID controllers)"
.sp
.BR "* it8212" " (for flash ROMs on ITE IT8212F ATA/RAID controller)"
.sp
.BR "* ft2232_spi" " (for SPI flash ROMs attached to an FT2232/FT4232H/FT232H family based USB SPI programmer).
.sp
.BR "* serprog" " (for flash ROMs attached to a programmer speaking serprog, \
including some Arduino-based devices)."
.sp
.BR "* buspirate_spi" " (for SPI flash ROMs attached to a Bus Pirate)"
.sp
.BR "* dediprog" " (for SPI flash ROMs attached to a Dediprog SF100)"
.sp
.BR "* rayer_spi" " (for SPI flash ROMs attached to a parallel port by one of various cable types)"
.sp
.BR "* pony_spi" " (for SPI flash ROMs attached to a SI-Prog serial port "
bitbanging adapter)
.sp
.BR "* nicintel_spi" " (for SPI flash ROMs on Intel Gigabit network cards)"
.sp
.BR "* ogp_spi" " (for SPI flash ROMs on Open Graphics Project graphics card)"
.sp
.BR "* linux_mtd" " (for SPI flash ROMs accessible via /dev/mtdX on Linux)"
.sp
.BR "* linux_spi" " (for SPI flash ROMs accessible via /dev/spidevX.Y on Linux)"
.sp
.BR "* usbblaster_spi" " (for SPI flash ROMs attached to an Altera USB-Blaster compatible cable)"
.sp
.BR "* nicintel_eeprom" " (for SPI EEPROMs on Intel Gigabit network cards)"
.sp
.BR "* mstarddc_spi" " (for SPI flash ROMs accessible through DDC in MSTAR-equipped displays)"
.sp
.BR "* pickit2_spi" " (for SPI flash ROMs accessible via Microchip PICkit2)"
.sp
.BR "* ch341a_spi" " (for SPI flash ROMs attached to WCH CH341A)"
.sp
.BR "* digilent_spi" " (for SPI flash ROMs attached to iCEblink40 development boards)"
.sp
.BR "* jlink_spi" " (for SPI flash ROMs attached to SEGGER J-Link and compatible devices)"
.sp
.BR "* ni845x_spi" " (for SPI flash ROMs attached to National Instruments USB-8451 or USB-8452)"
.sp
.BR "* stlinkv3_spi" " (for SPI flash ROMs attached to STMicroelectronics STLINK V3 devices)"
.sp
Some programmers have optional or mandatory parameters which are described
in detail in the
.B PROGRAMMER-SPECIFIC INFORMATION
section. Support for some programmers can be disabled at compile time.
.B "flashrom \-h"
lists all supported programmers.
.TP
.B "\-h, \-\-help"
Show a help text and exit.
.TP
.B "\-o, \-\-output <logfile>"
Save the full debug log to
.BR <logfile> .
If the file already exists, it will be overwritten. This is the recommended
way to gather logs from flashrom because they will be verbose even if the
on-screen messages are not verbose and don't require output redirection.
.TP
.B "\-R, \-\-version"
Show version information and exit.
.SH PROGRAMMER-SPECIFIC INFORMATION
Some programmer drivers accept further parameters to set programmer-specific
parameters. These parameters are separated from the programmer name by a
colon. While some programmers take arguments at fixed positions, other
programmers use a key/value interface in which the key and value is separated
by an equal sign and different pairs are separated by a comma or a colon.
.SS
.BR "internal " programmer
.TP
.B Board Enables
.sp
Some mainboards require to run mainboard specific code to enable flash erase
and write support (and probe support on old systems with parallel flash).
The mainboard brand and model (if it requires specific code) is usually
autodetected using one of the following mechanisms: If your system is
running coreboot, the mainboard type is determined from the coreboot table.
Otherwise, the mainboard is detected by examining the onboard PCI devices
and possibly DMI info. If PCI and DMI do not contain information to uniquely
identify the mainboard (which is the exception), or if you want to override
the detected mainboard model, you can specify the mainboard using the
.sp
.B " flashrom \-p internal:mainboard=<vendor>:<board>"
syntax.
.sp
See the 'Known boards' or 'Known laptops' section in the output
of 'flashrom \-L' for a list of boards which require the specification of
the board name, if no coreboot table is found.
.sp
Some of these board-specific flash enabling functions (called
.BR "board enables" )
in flashrom have not yet been tested. If your mainboard is detected needing
an untested board enable function, a warning message is printed and the
board enable is not executed, because a wrong board enable function might
cause the system to behave erratically, as board enable functions touch the
low-level internals of a mainboard. Not executing a board enable function
(if one is needed) might cause detection or erasing failure. If your board
protects only part of the flash (commonly the top end, called boot block),
flashrom might encounter an error only after erasing the unprotected part,
so running without the board-enable function might be dangerous for erase
and write (which includes erase).
.sp
The suggested procedure for a mainboard with untested board specific code is
to first try to probe the ROM (just invoke flashrom and check that it
detects your flash chip type) without running the board enable code (i.e.
without any parameters). If it finds your chip, fine. Otherwise, retry
probing your chip with the board-enable code running, using
.sp
.B " flashrom \-p internal:boardenable=force"
.sp
If your chip is still not detected, the board enable code seems to be broken
or the flash chip unsupported. Otherwise, make a backup of your current ROM
contents (using
.BR \-r )
and store it to a medium outside of your computer, like
a USB drive or a network share. If you needed to run the board enable code
already for probing, use it for reading too.
If reading succeeds and the contens of the read file look legit you can try to write the new image.
You should enable the board enable code in any case now, as it
has been written because it is known that writing/erasing without the board
enable is going to fail. In any case (success or failure), please report to
the flashrom mailing list, see below.
.sp
.TP
.B Coreboot
.sp
On systems running coreboot, flashrom checks whether the desired image matches
your mainboard. This needs some special board ID to be present in the image.
If flashrom detects that the image you want to write and the current board
do not match, it will refuse to write the image unless you specify
.sp
.B " flashrom \-p internal:boardmismatch=force"
.TP
.B ITE IT87 Super I/O
.sp
If your mainboard is manufactured by GIGABYTE and supports DualBIOS it is very likely that it uses an
ITE IT87 series Super I/O to switch between the two flash chips. Only one of them can be accessed at a time
and you can manually select which one to use with the
.sp
.B " flashrom \-p internal:dualbiosindex=chip"
.sp
syntax where
.B chip
is the index of the chip to use (0 = main, 1 = backup). You can check which one is currently selected by
leaving out the
.B chip
parameter.
.sp
If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus
translation, flashrom should autodetect that configuration. If you want to
set the I/O base port of the IT87 series SPI controller manually instead of
using the value provided by the BIOS, use the
.sp
.B " flashrom \-p internal:it87spiport=portnum"
.sp
syntax where
.B portnum
is the I/O port number (must be a multiple of 8). In the unlikely case
flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a bug
report so we can diagnose the problem.
.sp
.TP
.B AMD chipsets
.sp
Beginning with the SB700 chipset there is an integrated microcontroller (IMC) based on the 8051 embedded in
every AMD southbridge. Its firmware resides in the same flash chip as the host's which makes writing to the
flash risky if the IMC is active. Flashrom tries to temporarily disable the IMC but even then changing the
contents of the flash can have unwanted effects: when the IMC continues (at the latest after a reboot) it will
continue executing code from the flash. If the code was removed or changed in an unfortunate way it is
unpredictable what the IMC will do. Therefore, if flashrom detects an active IMC it will disable write support
unless the user forces it with the
.sp
.B " flashrom \-p internal:amd_imc_force=yes"
.sp
syntax. The user is responsible for supplying a suitable image or leaving out the IMC region with the help of
a layout file. This limitation might be removed in the future when we understand the details better and have
received enough feedback from users. Please report the outcome if you had to use this option to write a chip.
.sp
An optional
.B spispeed
parameter specifies the frequency of the SPI bus where applicable (i.e.\& SB600 or later with an SPI flash chip
directly attached to the chipset).
Syntax is
.sp
.B " flashrom \-p internal:spispeed=frequency"
.sp
where
.B frequency
can be
.BR "'16.5\ MHz'" ", " "'22\ MHz'" ", " "'33\ MHz'" ", " "'66\ MHz'" ", " "'100\ MHZ'" ", or " "'800\ kHz'" "."
Support of individual frequencies depends on the generation of the chipset:
.sp
* SB6xx, SB7xx, SP5xxx: from 16.5 MHz up to and including 33 MHz
.sp
-The default is to use 16.5 MHz and disable Fast Reads.
.sp
* SB8xx, SB9xx, Hudson: from 16.5 MHz up to and including 66 MHz
.sp
-The default is to use 16.5 MHz and disable Fast Reads.
.sp
* Yangtze (with SPI 100 engine as found in Kabini and Tamesh): all of them
.sp
-The default is to use the frequency that is currently configured.
.sp
An optional
.B spireadmode
parameter specifies the read mode of the SPI bus where applicable (Bolton or later).
Syntax is
.sp
.B " flashrom \-p internal:spireadmode=mode"
.sp
where
.B mode
can be
.BR "'Normal\ (up\ to\ 33 MHz)'" ", " "'Normal\ (up\ to\ 66 MHz)'" ", " "'Dual\ IO\ (1-1-2)'" ", " "'Quad\ IO\ (1-1-4)'" ", " "'Dual\ IO\ (1-2-2)'" ", " "'Quad\ IO\ (1-4-4)'" ", or " "'Fast\ Read'" "."
.sp
The default is to use the read mode that is currently configured.
.TP
.B Intel chipsets
.sp
If you have an Intel chipset with an ICH8 or later southbridge with SPI flash
attached, and if a valid descriptor was written to it (e.g.\& by the vendor), the
chipset provides an alternative way to access the flash chip(s) named
.BR "Hardware Sequencing" .
It is much simpler than the normal access method (called
.BR "Software Sequencing" "),"
but does not allow the software to choose the SPI commands to be sent.
You can use the
.sp
.B " flashrom \-p internal:ich_spi_mode=value"
.sp
syntax where
.BR "value " "can be"
.BR auto ", " swseq " or " hwseq .
By default
.RB "(or when setting " ich_spi_mode=auto )
the module tries to use swseq and only activates hwseq if need be (e.g.\& if
important opcodes are inaccessible due to lockdown; or if more than one flash
chip is attached). The other options (swseq, hwseq) select the respective mode
(if possible).
.sp
ICH8 and later southbridges may also have locked address ranges of different
kinds if a valid descriptor was written to it. The flash address space is then
partitioned in multiple so called "Flash Regions" containing the host firmware,
the ME firmware and so on respectively. The flash descriptor can also specify up
to 5 so called "Protected Regions", which are freely chosen address ranges
independent from the aforementioned "Flash Regions". All of them can be write
and/or read protected individually.
.sp
If you have an Intel chipset with an ICH2 or later southbridge and if you want
to set specific IDSEL values for a non-default flash chip or an embedded
controller (EC), you can use the
.sp
.B " flashrom \-p internal:fwh_idsel=value"
.sp
syntax where
.B value
is the 48-bit hexadecimal raw value to be written in the
IDSEL registers of the Intel southbridge. The upper 32 bits use one hex digit
each per 512 kB range between 0xffc00000 and 0xffffffff, and the lower 16 bits
use one hex digit each per 1024 kB range between 0xff400000 and 0xff7fffff.
The rightmost hex digit corresponds with the lowest address range. All address
ranges have a corresponding sister range 4 MB below with identical IDSEL
settings. The default value for ICH7 is given in the example below.
.sp
Example:
.B "flashrom \-p internal:fwh_idsel=0x001122334567"
.TP
.B Laptops
.sp
Using flashrom on older laptops that don't boot from the SPI bus is
dangerous and may easily make your hardware unusable (see also the
.B BUGS
section). The embedded controller (EC) in some
machines may interact badly with flashing.
More information is
.URLB https://flashrom.org/Laptops "in the wiki" .
Problems occur when the flash chip is shared between BIOS
and EC firmware, and the latter does not expect flashrom
to access the chip. While flashrom tries to change the contents of
that memory the EC might need to fetch new instructions or data from it and
could stop working correctly. Probing for and reading from the chip may also
irritate your EC and cause fan failure, backlight failure, sudden poweroff, and
other nasty effects. flashrom will attempt to detect if it is running on such a
laptop and limit probing to SPI buses. If you want to probe the LPC bus
anyway at your own risk, use
.sp
.B " flashrom \-p internal:laptop=force_I_want_a_brick"
.sp
We will not help you if you force flashing on a laptop because this is a really
dumb idea.
.sp
You have been warned.
.sp
Currently we rely on the chassis type encoded in the DMI/SMBIOS data to detect
laptops. Some vendors did not implement those bits correctly or set them to
generic and/or dummy values. flashrom will then issue a warning and restrict
buses like above. In this case you can use
.sp
.B " flashrom \-p internal:laptop=this_is_not_a_laptop"
.sp
to tell flashrom (at your own risk) that it is not running on a laptop.
.SS
.BR "dummy " programmer
.IP
The dummy programmer operates on a buffer in memory only. It provides a safe and fast way to test various
aspects of flashrom and is mainly used in development and while debugging.
It is able to emulate some chips to a certain degree (basic
identify/read/erase/write operations work).
.sp
An optional parameter specifies the bus types it
should support. For that you have to use the
.sp
.B " flashrom \-p dummy:bus=[type[+type[+type]]]"
.sp
syntax where
.B type
can be
.BR parallel ", " lpc ", " fwh ", " spi
in any order. If you specify bus without type, all buses will be disabled.
If you do not specify bus, all buses will be enabled.
.sp
Example:
.B "flashrom \-p dummy:bus=lpc+fwh"
.sp
The dummy programmer supports flash chip emulation for automated self-tests
without hardware access. If you want to emulate a flash chip, use the
.sp
.B " flashrom \-p dummy:emulate=chip"
.sp
syntax where
.B chip
is one of the following chips (please specify only the chip name, not the
vendor):
.sp
.RB "* ST " M25P10.RES " SPI flash chip (128 kB, RES, page write)"
.sp
.RB "* SST " SST25VF040.REMS " SPI flash chip (512 kB, REMS, byte write)"
.sp
.RB "* SST " SST25VF032B " SPI flash chip (4096 kB, RDID, AAI write)"
.sp
.RB "* Macronix " MX25L6436 " SPI flash chip (8192 kB, RDID, SFDP)"
.sp
Example:
.B "flashrom -p dummy:emulate=SST25VF040.REMS"
.TP
.B Persistent images
.sp
If you use flash chip emulation, flash image persistence is available as well
by using the
.sp
.B " flashrom \-p dummy:emulate=chip,image=image.rom"
.sp
syntax where
.B image.rom
is the file where the simulated chip contents are read on flashrom startup and
where the chip contents on flashrom shutdown are written to.
.sp
Example:
.B "flashrom -p dummy:emulate=M25P10.RES,image=dummy.bin"
.TP
.B SPI write chunk size
.sp
If you use SPI flash chip emulation for a chip which supports SPI page write
with the default opcode, you can set the maximum allowed write chunk size with
the
.sp
.B " flashrom \-p dummy:emulate=chip,spi_write_256_chunksize=size"
.sp
syntax where
.B size
is the number of bytes (min.\& 1, max.\& 256).
.sp
Example:
.sp
.B " flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5"
.TP
.B SPI blacklist
.sp
To simulate a programmer which refuses to send certain SPI commands to the
flash chip, you can specify a blacklist of SPI commands with the
.sp
.B " flashrom -p dummy:spi_blacklist=commandlist"
.sp
syntax where
.B commandlist
is a list of two-digit hexadecimal representations of
SPI commands. If commandlist is e.g.\& 0302, flashrom will behave as if the SPI
controller refuses to run command 0x03 (READ) and command 0x02 (WRITE).
commandlist may be up to 512 characters (256 commands) long.
Implementation note: flashrom will detect an error during command execution.
.sp
.TP
.B SPI ignorelist
.sp
To simulate a flash chip which ignores (doesn't support) certain SPI commands,
you can specify an ignorelist of SPI commands with the
.sp
.B " flashrom -p dummy:spi_ignorelist=commandlist"
.sp
syntax where
.B commandlist
is a list of two-digit hexadecimal representations of
SPI commands. If commandlist is e.g.\& 0302, the emulated flash chip will ignore
command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512
characters (256 commands) long.
Implementation note: flashrom won't detect an error during command execution.
.sp
.TP
.B SPI status register
.sp
You can specify the initial content of the chip's status register with the
.sp
.B " flashrom -p dummy:spi_status=content"
.sp
syntax where
.B content
is an 8-bit hexadecimal value.
.SS
.BR "nic3com" , " nicrealtek" , " nicnatsemi" , " nicintel", " nicintel_eeprom"\
, " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii"\
, " satamv" , " atahpt", " atavia ", " atapromise " and " it8212 " programmers
.IP
These programmers have an option to specify the PCI address of the card
your want to use, which must be specified if more than one card supported
by the selected programmer is installed in your system. The syntax is
.sp
.BR " flashrom \-p xxxx:pci=bb:dd.f" ,
.sp
where
.B xxxx
is the name of the programmer,
.B bb
is the PCI bus number,
.B dd
is the PCI device number, and
.B f
is the PCI function number of the desired device.
.sp
Example:
.B "flashrom \-p nic3com:pci=05:04.0"
.SS
.BR "atavia " programmer
.IP
Due to the mysterious address handling of the VIA VT6421A controller the user can specify an offset with the
.sp
.B " flashrom \-p atavia:offset=addr"
.sp
syntax where
.B addr
will be interpreted as usual (leading 0x (0) for hexadecimal (octal) values, or else decimal).
For more information please see
.URLB https://flashrom.org/VT6421A "its wiki page" .
.SS
.BR "atapromise " programmer
.IP
This programmer is currently limited to 32 kB, regardless of the actual size of the flash chip. This stems
from the fact that, on the tested device (a Promise Ultra100), not all of the chip's address lines were
actually connected. You may use this programmer to flash firmware updates, since these are only 16 kB in
size (padding to 32 kB is required).
.SS
.BR "nicintel_eeprom " programmer
.IP
This is the first programmer module in flashrom that does not provide access to NOR flash chips but EEPROMs
mounted on gigabit Ethernet cards based on Intel's 82580 NIC. Because EEPROMs normally do not announce their
size nor allow themselves to be identified, the controller relies on correct size values written to predefined
addresses within the chip. Flashrom follows this scheme but assumes the minimum size of 16 kB (128 kb) if an
unprogrammed EEPROM/card is detected. Intel specifies following EEPROMs to be compatible:
Atmel AT25128, AT25256, Micron (ST) M95128, M95256 and OnSemi (Catalyst) CAT25CS128.
.SS
.BR "ft2232_spi " programmer
.IP
This module supports various programmers based on FTDI FT2232/FT4232H/FT232H chips including the DLP Design
DLP-USB1232H, openbiosprog-spi, Amontec JTAGkey/JTAGkey-tiny/JTAGkey-2, Dangerous Prototypes Bus Blaster,
Olimex ARM-USB-TINY/-H, Olimex ARM-USB-OCD/-H, OpenMoko Neo1973 Debug board (V2+), TIAO/DIYGADGET USB
Multi-Protocol Adapter (TUMPA), TUMPA Lite, GOEPEL PicoTAP, Google Servo v1/v2 and Tin Can Tools
Flyswatter/Flyswatter 2.
.sp
An optional parameter specifies the controller
type, channel/interface/port and GPIO-based chip select it should support. For that you have to use the
.sp
.B " flashrom \-p ft2232_spi:type=model,port=interface,csgpiol=gpio"
.sp
syntax where
.B model
can be
.BR 2232H ", " 4232H ", " 232H ", " jtagkey ", " busblaster ", " openmoko ", " \
arm-usb-tiny ", " arm-usb-tiny-h ", " arm-usb-ocd ", " arm-usb-ocd-h \
", " tumpa ", " tumpalite ", " picotap ", " google-servo ", " google-servo-v2 \
" or " google-servo-v2-legacy
.B interface
can be
.BR A ", " B ", " C ", or " D
and
.B csgpiol
can be a number between 0 and 3, denoting GPIOL0-GPIOL3 correspondingly.
The default model is
.B 4232H
the default interface is
.BR A
and GPIO is not used by default.
.sp
If there is more than one ft2232_spi-compatible device connected, you can select which one should be used by
specifying its serial number with the
.sp
.B " flashrom \-p ft2232_spi:serial=number"
.sp
syntax where
.B number
is the serial number of the device (which can be found for example in the output of lsusb -v).
.sp
All models supported by the ft2232_spi driver can configure the SPI clock rate by setting a divisor. The
expressible divisors are all
.B even
numbers between 2 and 2^17 (=131072) resulting in SPI clock frequencies of
6 MHz down to about 92 Hz for 12 MHz inputs. The default divisor is set to 2, but you can use another one by
specifying the optional
.B divisor
parameter with the
.sp
.B " flashrom \-p ft2232_spi:divisor=div"
.sp
syntax.
.SS
.BR "serprog " programmer
.IP
This module supports all programmers speaking the serprog protocol. This includes some Arduino-based devices
as well as various programmers by Urja Rannikko, Juhana Helovuo, Stefan Tauner, Chi Zhang and many others.
.sp
A mandatory parameter specifies either a serial device (and baud rate) or an IP/port combination for
communicating with the programmer.
The device/baud combination has to start with
.B dev=
and separate the optional baud rate with a colon.
For example
.sp
.B " flashrom \-p serprog:dev=/dev/ttyS0:115200"
.sp
If no baud rate is given the default values by the operating system/hardware will be used.
For IP connections you have to use the
.sp
.B " flashrom \-p serprog:ip=ipaddr:port"
.sp
syntax.
In case the device supports it, you can set the SPI clock frequency with the optional
.B spispeed
parameter. The frequency is parsed as hertz, unless an
.BR M ", or " k
suffix is given, then megahertz or kilohertz are used respectively.
Example that sets the frequency to 2 MHz:
.sp
.B " flashrom \-p serprog:dev=/dev/device:baud,spispeed=2M"
.sp
More information about serprog is available in
.B serprog-protocol.txt
in the source distribution.
.SS
.BR "buspirate_spi " programmer
.IP
A required
.B dev
parameter specifies the Bus Pirate device node and an optional
.B spispeed
parameter specifies the frequency of the SPI bus. The parameter
delimiter is a comma. Syntax is
.sp
.B " flashrom \-p buspirate_spi:dev=/dev/device,spispeed=frequency"
.sp
where
.B frequency
can be
.BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M " or " 8M
(in Hz). The default is the maximum frequency of 8 MHz.
.sp
The baud rate for communication between the host and the Bus Pirate can be specified with the optional
.B serialspeed
parameter. Syntax is
.sp
.B " flashrom -p buspirate_spi:serialspeed=baud
.sp
where
.B baud
can be
.BR 115200 ", " 230400 ", " 250000 " or " 2000000 " (" 2M ")."
The default is 2M baud for Bus Pirate hardware version 3.0 and greater, and 115200 otherwise.
.sp
An optional pullups parameter specifies the use of the Bus Pirate internal pull-up resistors. This may be
needed if you are working with a flash ROM chip that you have physically removed from the board. Syntax is
.sp
.B " flashrom -p buspirate_spi:pullups=state"
.sp
where
.B state
can be
.BR on " or " off .
More information about the Bus Pirate pull-up resistors and their purpose is available
.URLB "http://dangerousprototypes.com/docs/Practical_guide_to_Bus_Pirate_pull-up_resistors" \
"in a guide by dangerousprototypes" .
Only the external supply voltage (Vpu) is supported as of this writing.
.SS
.BR "pickit2_spi " programmer
.IP
An optional
.B voltage
parameter specifies the voltage the PICkit2 should use. The default unit is Volt if no unit is specified.
You can use
.BR mV ", " millivolt ", " V " or " Volt
as unit specifier. Syntax is
.sp
.B " flashrom \-p pickit2_spi:voltage=value"
.sp
where
.B value
can be
.BR 0V ", " 1.8V ", " 2.5V ", " 3.5V
or the equivalent in mV.
.sp
An optional
.B spispeed
parameter specifies the frequency of the SPI bus. Syntax is
.sp
.B " flashrom \-p pickit2_spi:spispeed=frequency"
.sp
where
.B frequency
can be
.BR 250k ", " 333k ", " 500k " or " 1M "
(in Hz). The default is a frequency of 1 MHz.
.SS
.BR "dediprog " programmer
.IP
An optional
.B voltage
parameter specifies the voltage the Dediprog should use. The default unit is
Volt if no unit is specified. You can use
.BR mV ", " milliVolt ", " V " or " Volt
as unit specifier. Syntax is
.sp
.B " flashrom \-p dediprog:voltage=value"
.sp
where
.B value
can be
.BR 0V ", " 1.8V ", " 2.5V ", " 3.5V
or the equivalent in mV.
.sp
An optional
.B device
parameter specifies which of multiple connected Dediprog devices should be used.
Please be aware that the order depends on libusb's usb_get_busses() function and that the numbering starts
at 0.
Usage example to select the second device:
.sp
.B " flashrom \-p dediprog:device=1"
.sp
An optional
.B spispeed
parameter specifies the frequency of the SPI bus. The firmware on the device needs to be 5.0.0 or newer.
Syntax is
.sp
.B " flashrom \-p dediprog:spispeed=frequency"
.sp
where
.B frequency
can be
.BR 375k ", " 750k ", " 1.5M ", " 2.18M ", " 3M ", " 8M ", " 12M " or " 24M
(in Hz). The default is a frequency of 12 MHz.
.sp
An optional
.B target
parameter specifies which target chip should be used. Syntax is
.sp
.B " flashrom \-p dediprog:target=value"
.sp
where
.B value
can be
.BR 1 " or " 2
to select target chip 1 or 2 respectively. The default is target chip 1.
.SS
.BR "rayer_spi " programmer
.IP
The default I/O base address used for the parallel port is 0x378 and you can use
the optional
.B iobase
parameter to specify an alternate base I/O address with the
.sp
.B " flashrom \-p rayer_spi:iobase=baseaddr"
.sp
syntax where
.B baseaddr
is base I/O port address of the parallel port, which must be a multiple of
four. Make sure to not forget the "0x" prefix for hexadecimal port addresses.
.sp
The default cable type is the RayeR cable. You can use the optional