diff --git a/third_party/nrfx-custom/README.md b/third_party/nrfx-custom/README.md index 6485d4c..f85e0cf 100644 --- a/third_party/nrfx-custom/README.md +++ b/third_party/nrfx-custom/README.md @@ -8,6 +8,10 @@ This folder contains a subset of files imported from [NordicSemiconductor/nrfx]( - The [`nrf52840_xxaa.ld`](https://github.com/NordicSemiconductor/nrfx/blob/7ef620bedd3fd41828e0f81523a1d08a986b8a0e/mdk/nrf52840_xxaa.ld) linker script was imported at state NordicSemiconductor/nrfx@7ef620b. +- The [`nrf5340_xxaa_application.ld`](https://github.com/NordicSemiconductor/nrfx/blob/7ef620bedd3fd41828e0f81523a1d08a986b8a0e/mdk/nrf5340_xxaa_application.ld) linker script was imported at state NordicSemiconductor/nrfx@7ef620b. + - The file [`nrf_common.ld`](https://github.com/NordicSemiconductor/nrfx/blob/7ef620bedd3fd41828e0f81523a1d08a986b8a0e/mdk/nrf_common.ld) was imported at state NordicSemiconductor/nrfx@7ef620b. - The file [`gcc_startup_nrf52840.S`](https://github.com/NordicSemiconductor/nrfx/blob/7ef620bedd3fd41828e0f81523a1d08a986b8a0e/mdk/gcc_startup_nrf52840.S) was imported at state NordicSemiconductor/nrfx@7ef620b. + +- The file [`gcc_startup_nrf5340_application.S`](https://github.com/NordicSemiconductor/nrfx/blob/7ef620bedd3fd41828e0f81523a1d08a986b8a0e/mdk/gcc_startup_nrf5340_application.S) was imported at state NordicSemiconductor/nrfx@7ef620b. diff --git a/third_party/nrfx-custom/gcc_startup_nrf5340_application.S b/third_party/nrfx-custom/gcc_startup_nrf5340_application.S new file mode 100644 index 0000000..d2d93f8 --- /dev/null +++ b/third_party/nrfx-custom/gcc_startup_nrf5340_application.S @@ -0,0 +1,593 @@ +/* + +Copyright (c) 2009-2023 ARM Limited. All rights reserved. + + SPDX-License-Identifier: Apache-2.0 + +Licensed under the Apache License, Version 2.0 (the License); you may +not use this file except in compliance with the License. +You may obtain a copy of the License at + + www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an AS IS BASIS, WITHOUT +WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. + +NOTICE: This file has been modified by Nordic Semiconductor ASA. + +*/ + + .syntax unified + .arch armv8-m.main + +#ifdef __STARTUP_CONFIG +#include "startup_config.h" +#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT +#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3 +#endif +#endif + + .section .stack +#if defined(__STARTUP_CONFIG) + .align __STARTUP_CONFIG_STACK_ALIGNEMENT + .equ Stack_Size, __STARTUP_CONFIG_STACK_SIZE +#elif defined(__STACK_SIZE) + .align 3 + .equ Stack_Size, __STACK_SIZE +#else + .align 3 + .equ Stack_Size, 16384 +#endif + .globl __StackTop + .globl __StackLimit +__StackLimit: + .space Stack_Size + .size __StackLimit, . - __StackLimit +__StackTop: + .size __StackTop, . - __StackTop + + .section .heap + .align 3 +#if defined(__STARTUP_CONFIG) + .equ Heap_Size, __STARTUP_CONFIG_HEAP_SIZE +#elif defined(__HEAP_SIZE) + .equ Heap_Size, __HEAP_SIZE +#else + .equ Heap_Size, 16384 +#endif + .globl __HeapBase + .globl __HeapLimit +__HeapBase: + .if Heap_Size + .space Heap_Size + .endif + .size __HeapBase, . - __HeapBase +__HeapLimit: + .size __HeapLimit, . - __HeapLimit + + .section .isr_vector, "ax" + .align 2 + .globl __isr_vector +__isr_vector: + .long __StackTop /* Top of Stack */ + .long Reset_Handler + .long NMI_Handler + .long HardFault_Handler + .long MemoryManagement_Handler + .long BusFault_Handler + .long UsageFault_Handler + .long SecureFault_Handler + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long SVC_Handler + .long DebugMon_Handler + .long 0 /*Reserved */ + .long PendSV_Handler + .long SysTick_Handler + + /* External Interrupts */ + .long FPU_IRQHandler + .long CACHE_IRQHandler + .long 0 /*Reserved */ + .long SPU_IRQHandler + .long 0 /*Reserved */ + .long CLOCK_POWER_IRQHandler + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long SERIAL0_IRQHandler + .long SERIAL1_IRQHandler + .long SPIM4_IRQHandler + .long SERIAL2_IRQHandler + .long SERIAL3_IRQHandler + .long GPIOTE0_IRQHandler + .long SAADC_IRQHandler + .long TIMER0_IRQHandler + .long TIMER1_IRQHandler + .long TIMER2_IRQHandler + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long RTC0_IRQHandler + .long RTC1_IRQHandler + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long WDT0_IRQHandler + .long WDT1_IRQHandler + .long COMP_LPCOMP_IRQHandler + .long EGU0_IRQHandler + .long EGU1_IRQHandler + .long EGU2_IRQHandler + .long EGU3_IRQHandler + .long EGU4_IRQHandler + .long EGU5_IRQHandler + .long PWM0_IRQHandler + .long PWM1_IRQHandler + .long PWM2_IRQHandler + .long PWM3_IRQHandler + .long 0 /*Reserved */ + .long PDM0_IRQHandler + .long 0 /*Reserved */ + .long I2S0_IRQHandler + .long 0 /*Reserved */ + .long IPC_IRQHandler + .long QSPI_IRQHandler + .long 0 /*Reserved */ + .long NFCT_IRQHandler + .long 0 /*Reserved */ + .long GPIOTE1_IRQHandler + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long QDEC0_IRQHandler + .long QDEC1_IRQHandler + .long 0 /*Reserved */ + .long USBD_IRQHandler + .long USBREGULATOR_IRQHandler + .long 0 /*Reserved */ + .long KMU_IRQHandler + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long CRYPTOCELL_IRQHandler + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + .long 0 /*Reserved */ + + .size __isr_vector, . - __isr_vector + +/* Reset Handler */ + + + .text + .thumb + .thumb_func + .align 1 + .globl Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + + +/* Loop to copy data from read only memory to RAM. + * The ranges of copy from/to are specified by following symbols: + * __etext: LMA of start of the section to copy from. Usually end of text + * __data_start: VMA of start of the section to copy to. + * __data_end: VMA of end of the section to copy to. + * + * All addresses must be aligned to 4 bytes boundary. + */ +#ifndef __STARTUP_SKIP_ETEXT + +/* Load .data */ + ldr r1, =__data_start + ldr r2, =__data_end + ldr r3, =__data_load_start + bl copy_region + +/* Load .sdata */ + ldr r1, =__sdata_start + ldr r2, =__sdata_end + ldr r3, =__sdata_load_start + bl copy_region + +/* Load .tdata */ + ldr r1, =__tdata_start + ldr r2, =__tdata_end + ldr r3, =__tdata_load_start + bl copy_region + +/* Load .fast */ + ldr r1, =__fast_start + ldr r2, =__fast_end + ldr r3, =__fast_load_start + bl copy_region + + b copy_etext_done + +/* Method that loads data from nvm to ram */ +copy_region: + subs r2, r2, r1 + ble L_copy_region_done + +L_copy_region: + subs r2, r2, #4 + ldr r0, [r3,r2] + str r0, [r1,r2] + bgt L_copy_region + +L_copy_region_done: + + bx lr + +copy_etext_done: + + +#endif + +/* This part of work usually is done in C library startup code. Otherwise, + * define __STARTUP_CLEAR_BSS to enable it in this startup. This section + * clears the RAM where BSS data is located. + * + * The BSS section is specified by following symbols + * __bss_start__: start of the BSS section. + * __bss_end__: end of the BSS section. + * + * All addresses must be aligned to 4 bytes boundary. + */ +#ifdef __STARTUP_CLEAR_BSS + ldr r1, =__bss_start__ + ldr r2, =__bss_end__ + bl clear_region + + ldr r1, =__tbss_start__ + ldr r2, =__tbss_end__ + bl clear_region + + ldr r1, =__sbss_start__ + ldr r2, =__sbss_end__ + bl clear_region + + b clear_bss_done + +/* Method that clears default-0 registers */ +clear_region: + movs r0, 0 + + subs r2, r2, r1 + ble .L_clear_region_done + +.L_clear_region: + subs r2, r2, #4 + str r0, [r1, r2] + bgt .L_clear_region + +.L_clear_region_done: + + bx lr + +clear_bss_done: + +#endif /* __STARTUP_CLEAR_BSS */ + +/* Execute SystemInit function. */ + bl SystemInit + +/* Call _start function provided by libraries. + * If those libraries are not accessible, define __START as your entry point. + */ +#ifndef __START +#define __START _start +#endif + bl __START + + .pool + .size Reset_Handler,.-Reset_Handler + + .section ".text" + + +/* Dummy Exception Handlers (infinite loops which can be modified) */ + + .weak NMI_Handler + .type NMI_Handler, %function +NMI_Handler: + b . + .size NMI_Handler, . - NMI_Handler + + + .weak HardFault_Handler + .type HardFault_Handler, %function +HardFault_Handler: + b . + .size HardFault_Handler, . - HardFault_Handler + + + .weak MemoryManagement_Handler + .type MemoryManagement_Handler, %function +MemoryManagement_Handler: + b . + .size MemoryManagement_Handler, . - MemoryManagement_Handler + + + .weak BusFault_Handler + .type BusFault_Handler, %function +BusFault_Handler: + b . + .size BusFault_Handler, . - BusFault_Handler + + + .weak UsageFault_Handler + .type UsageFault_Handler, %function +UsageFault_Handler: + b . + .size UsageFault_Handler, . - UsageFault_Handler + + + .weak SecureFault_Handler + .type SecureFault_Handler, %function +SecureFault_Handler: + b . + .size SecureFault_Handler, . - SecureFault_Handler + + + .weak SVC_Handler + .type SVC_Handler, %function +SVC_Handler: + b . + .size SVC_Handler, . - SVC_Handler + + + .weak DebugMon_Handler + .type DebugMon_Handler, %function +DebugMon_Handler: + b . + .size DebugMon_Handler, . - DebugMon_Handler + + + .weak PendSV_Handler + .type PendSV_Handler, %function +PendSV_Handler: + b . + .size PendSV_Handler, . - PendSV_Handler + + + .weak SysTick_Handler + .type SysTick_Handler, %function +SysTick_Handler: + b . + .size SysTick_Handler, . - SysTick_Handler + + +/* IRQ Handlers */ + + .globl Default_Handler + .type Default_Handler, %function +Default_Handler: + b . + .size Default_Handler, . - Default_Handler + + .macro IRQ handler + .weak \handler + .set \handler, Default_Handler + .endm + + IRQ FPU_IRQHandler + IRQ CACHE_IRQHandler + IRQ SPU_IRQHandler + IRQ CLOCK_POWER_IRQHandler + IRQ SERIAL0_IRQHandler + IRQ SERIAL1_IRQHandler + IRQ SPIM4_IRQHandler + IRQ SERIAL2_IRQHandler + IRQ SERIAL3_IRQHandler + IRQ GPIOTE0_IRQHandler + IRQ SAADC_IRQHandler + IRQ TIMER0_IRQHandler + IRQ TIMER1_IRQHandler + IRQ TIMER2_IRQHandler + IRQ RTC0_IRQHandler + IRQ RTC1_IRQHandler + IRQ WDT0_IRQHandler + IRQ WDT1_IRQHandler + IRQ COMP_LPCOMP_IRQHandler + IRQ EGU0_IRQHandler + IRQ EGU1_IRQHandler + IRQ EGU2_IRQHandler + IRQ EGU3_IRQHandler + IRQ EGU4_IRQHandler + IRQ EGU5_IRQHandler + IRQ PWM0_IRQHandler + IRQ PWM1_IRQHandler + IRQ PWM2_IRQHandler + IRQ PWM3_IRQHandler + IRQ PDM0_IRQHandler + IRQ I2S0_IRQHandler + IRQ IPC_IRQHandler + IRQ QSPI_IRQHandler + IRQ NFCT_IRQHandler + IRQ GPIOTE1_IRQHandler + IRQ QDEC0_IRQHandler + IRQ QDEC1_IRQHandler + IRQ USBD_IRQHandler + IRQ USBREGULATOR_IRQHandler + IRQ KMU_IRQHandler + IRQ CRYPTOCELL_IRQHandler + + .end diff --git a/third_party/nrfx-custom/nrf5340_xxaa_application.ld b/third_party/nrfx-custom/nrf5340_xxaa_application.ld new file mode 100644 index 0000000..89cb624 --- /dev/null +++ b/third_party/nrfx-custom/nrf5340_xxaa_application.ld @@ -0,0 +1,15 @@ +/* Linker script to configure memory regions. */ + +SEARCH_DIR(.) +GROUP(-lgcc -lc -lnosys) + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x100000 + EXTFLASH (rx) : ORIGIN = 0x10000000, LENGTH = 0x8000000 + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x40000 + RAM1 (rwx) : ORIGIN = 0x20040000, LENGTH = 0x3F000 +} + + +INCLUDE "nrf_common.ld"