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isim.log
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isim.log
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ISim log file
Running: F:\Edu\FPGA\CDC\tb_isim_par.exe -intstyle ise -gui -sdfmax /uut/=netgen/par/top_timesim.sdf -sdfroot /uut -tclbatch isim.cmd -wdb F:/Edu/FPGA/CDC/tb_isim_par.wdb
ISim P.20131013 (signature 0x7708f090)
This is a Full version of ISim.
INFO: SDF backannotation was successful with SDF file netgen/par/top_timesim.sdf, for root module /uut/.
Time resolution is 1 ps
# onerror resume
# wave add /
# run 1000 ns
Simulator is doing circuit initialization process.
Finished circuit initialization process.
# run all
Stopped at time : 329080 ns : File "F:/Edu/FPGA/CDC/tb.vhd" Line 70
ISim P.20131013 (signature 0x7708f090)
This is a Full version of ISim.
INFO: SDF backannotation was successful with SDF file netgen/par/top_timesim.sdf, for root module /uut/.
# run 1000 ns
Simulator is doing circuit initialization process.
Finished circuit initialization process.
ISim P.20131013 (signature 0x7708f090)
This is a Full version of ISim.
INFO: SDF backannotation was successful with SDF file netgen/par/top_timesim.sdf, for root module /uut/.
# run 1000 ns
Simulator is doing circuit initialization process.
Finished circuit initialization process.
# run 1.00us
# run 1.00us
# run 1.00us
ISim P.20131013 (signature 0x7708f090)
This is a Full version of ISim.
INFO: SDF backannotation was successful with SDF file netgen/par/top_timesim.sdf, for root module /uut/.
# run 1000 ns
Simulator is doing circuit initialization process.
Finished circuit initialization process.
# run 1.00us
# run 1.00us
ISim P.20131013 (signature 0x7708f090)
This is a Full version of ISim.
INFO: SDF backannotation was successful with SDF file netgen/par/top_timesim.sdf, for root module /uut/.
# run 1000 ns
Simulator is doing circuit initialization process.
Finished circuit initialization process.
# run 1.00us
# run 1.00us
# run 1.00us
# run 1.00us
# run 1.00us
The simulator has terminated in an unexpected manner. Please review the ISim log (isim.log) for details.