m6569: c accesses half a cycle too late?

[c1570]

According to vic-ii.txt, the first c access in badlines happens in the second half of cycle 15, and the following cycles have gi accesses first, then c accesses. In m6569.h, there is no c access in cycle 15, and the following cycles have c accesses first, then gi accesses. Is this intentional? It also seems weird since ?i accesses should always happen as first half of the cycles (phi low) as that's the default VIC-II half of the cycle, and for cycles 1..10,58..63 this is what m6569.h does as well. @floooh

[floooh]

The C64 emulation currently doesn't emulate half cycles, everything works at 'full cycle' granularity, so some actions that happen at half cycles on real hardware might have been moved into the full cycle before (or maybe even the cycle after, I'm not sure - it should be consistent though.

There might also be an 'off-by-one' situation in the m6569.h cycle ids vs what's in vic-ii.txt.

And of course there may be bugs...

So far I also mostly focused on conformance tests that didn't test for 'visual correctness', but mostly stuff that tests CPU and CIA timings (and IIRC there are a couple of problems left with CIA correctness too), I'll need to dig up some tests that focus on the VIC-II.

[c1570]

Thanks for the reply!

Yes I was a bit overspecific (currently working on something for that half cycles matter).
In any case, the first c access should happen sometime in the cycle before the gi access.

I tried to have a look at VICE source but that handles Phi1 and Phi0 in different codepaths and is quite complex. :/
But the recent Kawari code is quite plain there I think:
https://github.com/randyrossi/vicii-kawari/blob/797b8d77ac12b9b86e544d3e0bb5c5dc2e6c10e7/hdl/cycles.v#L47
LR state (Phi Low Refresh, cycle 15) => HRC state (badline Phi High post-Refresh C-access, cycle 15) => LG state (Phi Low G-access, cycle 16)

So that looks like an inconsistency/off-by-one in m6569.h.