diff --git a/src/coreclr/jit/emitxarch.cpp b/src/coreclr/jit/emitxarch.cpp index e3561bbff3797..2b98d14183aba 100644 --- a/src/coreclr/jit/emitxarch.cpp +++ b/src/coreclr/jit/emitxarch.cpp @@ -355,6 +355,22 @@ bool emitter::DoesWriteZeroFlag(instruction ins) return (flags & Writes_ZF) != 0; } +//------------------------------------------------------------------------ +// DoesWriteParityFlag: check if the instruction write the +// PF flag. +// +// Arguments: +// ins - instruction to test +// +// Return Value: +// true if instruction writes the PF flag, false otherwise. +// +bool emitter::DoesWriteParityFlag(instruction ins) +{ + insFlags flags = CodeGenInterface::instInfo[ins]; + return (flags & Writes_PF) != 0; +} + //------------------------------------------------------------------------ // DoesWriteSignFlag: check if the instruction writes the // SF flag. @@ -979,7 +995,8 @@ bool emitter::AreFlagsSetToZeroCmp(regNumber reg, emitAttr opSize, GenCondition // Certain instruction like and, or and xor modifies exactly same flags // as "test" instruction. // They reset OF and CF to 0 and modifies SF, ZF and PF. - if (DoesResetOverflowAndCarryFlags(lastIns)) + if (DoesResetOverflowAndCarryFlags(lastIns) && DoesWriteSignFlag(lastIns) && DoesWriteZeroFlag(lastIns) && + DoesWriteParityFlag(lastIns)) { return id->idOpSize() == opSize; } diff --git a/src/coreclr/jit/emitxarch.h b/src/coreclr/jit/emitxarch.h index d24a697d93c72..7ff6902613d59 100644 --- a/src/coreclr/jit/emitxarch.h +++ b/src/coreclr/jit/emitxarch.h @@ -484,6 +484,7 @@ bool IsThreeOperandAVXInstruction(instruction ins) const; static bool HasRegularWideForm(instruction ins); static bool HasRegularWideImmediateForm(instruction ins); static bool DoesWriteZeroFlag(instruction ins); +static bool DoesWriteParityFlag(instruction ins); static bool DoesWriteSignFlag(instruction ins); static bool DoesResetOverflowAndCarryFlags(instruction ins); bool IsFlagsAlwaysModified(instrDesc* id);