From 44e61264356124b627c3602de19e6cb11e8ee0c8 Mon Sep 17 00:00:00 2001
From: Justin Beaurivage <justin@wearableavionics.com>
Date: Mon, 24 Oct 2022 18:03:25 -0400
Subject: [PATCH] Minor fixes

---
 hal/src/async_hal/timer.rs    | 10 ++++++++--
 hal/src/sercom/mod.rs         | 11 +++++++++++
 hal/src/sercom/uart/config.rs |  2 +-
 3 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/hal/src/async_hal/timer.rs b/hal/src/async_hal/timer.rs
index 5e7a835fceaf..71284b5cced9 100644
--- a/hal/src/async_hal/timer.rs
+++ b/hal/src/async_hal/timer.rs
@@ -174,12 +174,18 @@ mod impl_ehal {
         type Error = Infallible;
         type DelayMsFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
         fn delay_ms(&mut self, ms: u32) -> Self::DelayMsFuture<'_> {
-            async move { Ok(self.delay(ms.ms()).await) }
+            async move {
+                self.delay(ms.ms()).await;
+                Ok(())
+            }
         }
 
         type DelayUsFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
         fn delay_us(&mut self, us: u32) -> Self::DelayUsFuture<'_> {
-            async move { Ok(self.delay(us.us()).await) }
+            async move {
+                self.delay(us.us()).await;
+                Ok(())
+            }
         }
     }
 }
diff --git a/hal/src/sercom/mod.rs b/hal/src/sercom/mod.rs
index 8baf97de884b..69571a94a68d 100644
--- a/hal/src/sercom/mod.rs
+++ b/hal/src/sercom/mod.rs
@@ -164,7 +164,11 @@ macro_rules! sercom {
                         use self::uart::Flags;
                         unsafe {
                             let mut peripherals = crate::pac::Peripherals::steal();
+
+                            #[cfg(any(feature = "samd11", feature = "samd21"))]
                             let uart = Self::reg_block(&mut peripherals).usart();
+                            #[cfg(feature = "min-samd51g")]
+                            let uart = Self::reg_block(&mut peripherals).usart_ext();
 
                             let flags_pending = Flags::from_bits_unchecked(uart.intflag.read().bits());
                             let enabled_flags = Flags::from_bits_unchecked(uart.intenset.read().bits());
@@ -203,12 +207,19 @@ sercom!(apbdmask: (4, 5));
 #[cfg(feature = "min-samd51n")]
 sercom!(apbdmask: (6, 7));
 
+#[allow(dead_code)]
 #[cfg(feature = "samd11")]
 const NUM_SERCOM: usize = 2;
+
+#[allow(dead_code)]
 #[cfg(feature = "samd21e")]
 const NUM_SERCOM: usize = 4;
+
+#[allow(dead_code)]
 #[cfg(any(feature = "min-samd21g", feature = "samd51g", feature = "samd51j"))]
 const NUM_SERCOM: usize = 6;
+
+#[allow(dead_code)]
 #[cfg(feature = "min-samd51n")]
 const NUM_SERCOM: usize = 8;
 
diff --git a/hal/src/sercom/uart/config.rs b/hal/src/sercom/uart/config.rs
index 1aaaa69e2447..e8b0bb90a2e9 100644
--- a/hal/src/sercom/uart/config.rs
+++ b/hal/src/sercom/uart/config.rs
@@ -88,7 +88,7 @@ impl<P: ValidPads> Config<P> {
 
         // Enable internal clock mode
         registers.configure_mode();
-        registers.configure_pads(P::RXPO as u8, P::TXPO as u8);
+        registers.configure_pads(P::RXPO, P::TXPO);
         registers.set_char_size(EightBit::SIZE);
 
         Self {