SX1302 general purpose i/o definition

[vAnArhist]

Hi all again!) I am working with loragw driver (ported it to esp32), now I need additional info on how can be interrupts mapped in order:

1. RX done event. In [other discussion] Lora Phy packet receiving. #93 (comment) there was a info about it, I mapped it in function, seems it works.

int sx1302_config_gpio(void) {
    int err;
   ****... OTHER GPIO INIT...****
    err = lgw_reg_w(SX1302_REG_GPIO_GPIO_SEL_6_SELECTION, GPIO_CFG_STATUS);   /* GPIO_6 => RX ON (toggled on each lora packet received) */
    CHECK_ERR(err);
    return LGW_REG_SUCCESS;
}

2. TX done event. I see on schematic GPIO[2] will toggle, but is there any possibility to map other GPIO for this? If yes, how?
3. GPIO[8]. How can this be used/mapped?
4. PPS input. Can it used other than PPS? Could anyone describe how it can be used?

[matthijskooijman]

Did you ever figure this out?

I've read here that GPIO6 can maybe be used for an RX watermark interrupt. I think that means IRQ when the RX buffer has more than a configured number of bytes, which I think would be perfect to prevent the current 10ms polling approach that is used for the uplink thread, and just waiting for a GPIO event. This should allow the host to actually sleep when there is no data, which I expect could lead to significant power savings (if you also refactor the jit thread to remove the 10ms polling here).