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FEX-2410

FEXCore

See FEXCore/Readme.md for more details

Glossary

  • Splatter: a code generator backend that concaternates configurable macros instead of doing isel
  • IR: Intermediate Representation, our high-level opcode representation, loosely modeling arm64
  • SSA: Single Static Assignment, a form of representing IR in memory
  • Basic Block: A block of instructions with no control flow, terminated by control flow
  • Fragment: A Collection of basic blocks, possibly an entire guest function or a subset of it

backend

IR to host code generation

arm64

shared

frontend

x86-meta-blocks

  • Frontend.cpp: Extracts instruction & block meta info, frontend multiblock logic

x86-tables

Metadata that drives the frontend x86/64 decoding

x86-to-ir

glue

Logic that binds various parts together

block-database

  • LookupCache.cpp: Stores information about blocks, and provides C++ implementations to lookup the blocks

driver

Emulation mainloop related glue logic

  • Core.cpp: Glues Frontend, OpDispatcher and IR Opts & Compilation, LookupCache, Dispatcher and provides the Execution loop entrypoint

log-manager

thunks

x86-guest-code

ir

debug

dumper

IR -> Text

emitter

C++ Functions to generate IR. See IR.json for spec.

opts

IR to IR Optimization

opcodes

cpuid

  • CPUID.cpp: Handles presented capability bits for guest cpu

dispatcher-implementations

ThunkLibs

See ThunkLibs/README.md for more details

thunklibs

These are generated + glue logic 1:1 thunks unless noted otherwise

EGL

GL

SDL2

VDSO

Vulkan

X11

asound

drm

fex_malloc

  • Guest.cpp: Handles allocations between guest and host thunks
  • Host.cpp: Handles allocations between guest and host thunks

fex_malloc_loader

  • Guest.cpp: Delays malloc symbol replacement until it is safe to run constructors

fex_malloc_symbols

  • Host.cpp: Allows FEX to export allocation symbols

fex_thunk_test

wayland-client

xshmfence

Source/Tests

unittests

See unittests/Readme.md for more details